ISSN 0352-9045 Informacije IMIDEM Journal of Microelectronics, Electronic Components and Materials Vol. 49, No. 1(2019), March 2019 Revija za mikroelektroniko, elektronske sestavne dele in materiale letnik 49, številka 1(2019), Marec 2019 UDK 621.3:(53+54+621+66)(05)(497.1)=00 ISSN 0352-9045 Informacije MIDEM 1-2019 Journalof Microelectronics, Electronic Components and Materials VOLUME 49, NO. 1(169), LJUBLJANA, MARCH 2019 | LETNIK 49, NO. 1(169), LJUBLJANA, MAREC 2019 Published quarterly (March, June, September, December) by Society for Microelectronics, Electronic Components and Materials - MIDEM. Copyright © 2019. All rights reserved. | Revija izhaja trimesečno (marec, junij, september, december). Izdaja Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale - Društvo MIDEM. Copyright © 2019. Vse pravice pridržane. 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Prispevke iz revije zajema ISI® v naslednje svoje produkte: Sci Search®, Research Alert® in Materials Science Citation Index™. Design | Oblikovanje: Snežana Madic Lešnik; Printed by | tisk: Biro M, Ljubljana; Circulation | Naklada: 1000 issues | izvodov; Slovenia Taxe Percue | Poštnina plačana pri pošti 1102 Ljubljana Informacije IMIDEM Journal of Microelectronics, Electronic Components and Materials vol. 49, No. 1(2019) Content | Vsebina Original scientific papers Izvirni znanstveni članki N. Buncic, A. Kabasi, T. Cakaric, A. Bilusic: 3 Prototyping of a High Frequency Phased Array Ultrasound Transducer on a Piezoelectric Thick Film N. Bunčic, A. Kabaši, T. Čakaric, A. Bilušic: Izdelava prototipa visokofrekvenčnega faznega polja ultrazvočnih pretvornikov na debelo plastnem piezoelektriku R.Hemalatha, R.Mahalakshmi: 11 R.Hemalatha, R.Mahalakshmi: A Memetic based Approach for Memetični pristop za usmerjanje in dodeljevanje Routing and Wavelength Assignment valovnih dolžin v optičnih prenosnih sistemih in Optical Transmission Systems L. F. Rahman, M. Bin Ibne Reaz, M. Marufuzzaman, L. M. Sidek: Design of Low Power and Low Phase Noise Current Starved Ring Oscillator for RFID Tag EEPROM 19 L. F. Rahman, M. Bin Ibne Reaz, M. Marufuzzaman, L. M. Sidek: Načrtovanje tokovno omejenga oscilatorja nizkih moči in nizkega faznega šuma za RFID EEPROM nalepke R. P. Nelapati, Sivasankaran K.: 25 R. P. Nelapati, Sivasankaran K.: Design and Performance Analysis of Hybrid Analiza zasnove in učinkovitosti hibridnega SELBOX Junctionless FinFET brezspojnega SELBOX FinFET-a M. Pirc: Idle Noise Reduction of a Parametric Acoustic Array Power Driver 33 M. Pirc: Zmanjšanje lastnega šuma ojačevalnika in modulatorja za parametrično akustično polje A. Ardehshiri, G. Karimi, R. Dehdasht-Heydari: Optimization of shunt capacitive RF MEMS switch by using NSGA-II algorithm and uti-liti algorithm 43 A. Ardehshiri, G. Karimi, R. Dehdasht-Heydari: Optimizacija šarazitne kapacitivnosti RF MEMS stikala z uporabo algoritmov NSGA-II in uti-liti Front page: Parametric acoustic arrays (M. Pirc) Naslovnica: Parametrično akustično polje (M. Pirc) 1 2 Original scientific paper https://doi.org/10.33180/InfMIDEM2019.101 Informacije IMIDEM Journal of Microelectronics, Electronic Components and Materials Vol. 49, No. 1(2019), 3 - 9 Prototyping of a High Frequency Phased Array Ultrasound Transducer on a Piezoelectric Thick Film Nikola Buncic1, Anton Kabasi2, Tonci Cakaric2, Ante Bilusic2 1INETEC - Institute for nuclear technology Ltd., Lucko, Croatia 2University of Split, Faculty of Science, Split, Croatia Abstract: A process including virtual prototyping of a high frequency phased array ultrasound transducer on a piezoelectric thick film using a finite element method (FEM) is shown. Generated FEM models were based on PMN-PT (Pb(Mg1/3Nb2/3)O3-PbTiO3) thick films, made by sol-gel technique, with the thickness vibrational mode resonant frequency of each film being close to 28.5MHz. Ultrasound transducers with such characteristics, due to their size and high frequency, are suitable for use in small medical diagnostic tools intended for use in delicate and sensitive areas (for example in ophthalmology and dermatology). With respect to their size, the transducers should retain very good focusing, beam steering and other advantages that phased array layout offers. To ensure an optimal performance of the phased array ultrasound transducer on such a piezoelectric thick film, several electrode patterns were used and tested in FEM simulations with the end goal of getting best performance from the PMN-PT thick films. A 64-element configuration was shown to be a promising technological solution for ophthalmological ultrasound diagnostics. Keywords: Phased Array, Thick Film, PzFlex/OnScale, High Frequency, PMN-PT Izdelava prototipa visokofrekvenčnega faznega polja ultrazvočnih pretvornikov na debelo plastnem piezoelektriku Izvleček: V članku je prikazan proces virtualne izdelave prototipa visokofrekvenčnega polja ultrazvočnih pretvornikov na debelo plastnem piezoelektriku na osnovi FEM metode. Generirani FEM modeli temeljijo na PMN-PT filmih, ki so narejeni na tehnologiji sol-gel in sicer z debelino z vibracijsko resonančno frekvenco blizu 28.5 MHz. Ultrazvočni pretvorniki teh dimenzij in frekvenc so primerni za uporabo v majhnih medicinski diagnostični opremi za uporabo v občutljivih območjih (npr. oftalmologija in dermatologija). Zaradi svoje majhnosti naj bi pretvorniki zagotavljali dober fokus in vodenje žarka. Za doseganje optimalnega delovanja so bili obravnavani bili številni vzorci faznega polja ultrazvočnih pretvornikov. Izkazalo se je, da je, za uporabo v oftalmologiji, najboljša kombinacija s 64 elementi. Ključne besede: fazno polje, debele plasti, PzFlex/OnScale, visoka frekvenca, PMN-PT * Corresponding Author's e-mail: akabasi@pmfst.hr, tonci@pmfst.hr, bilusic@pmfst.hr 1 Introduction In modern medicine ultrasound is still an important diagnostic tool, despite development of new and advanced diagnostic techniques. Ophthalmology is probably the most illustrative example: although optical diagnostic methods are more present in medical practices, in cases of blur of the eye caused by a trauma or a disease, ultrasound is still the best way to look inside the eye. Ultrasound ophthalmological instrumentation available on the market is generally based on vibrating piezoelectric bulk transducers generating a single ultrasound wave. Such technology limits the highest available frequency, the minimum focus depth, and the minimum plane-wave formation distance. 3 R. Hemalatha et al; Informacije Midem, Vol. 49, No. 1(2019), 11 - 18 Imaging of anterior eye chamber is rather important since precursors of many eye diseases create in it. Due to their generally low ultrasound frequency, this front part of the eye cannot be probed with high resolution by present ultrasound diagnostic tools. Since the resonant frequency of piezoelectric material inversely depends on its thickness, implementation of thick piezoelectric films as ultrasound-source material would increase the frequency to tens or hundreds MHz range. For ophthalmology applications such frequencies are targeted ones, since they can enable to probe microstructures on distances of few millimeters from the transducer. Linear array of micro-transducers based on a piezoelectric film could improve the overall performance further, since, by tuning the phase of each micro-transducer ultrasound, the diagnostic ultrasound wave can be focused in a controllable way. Although many research efforts are taken to create such phase-tuned linear arrays [1-8], they still cannot be routinely created. The major difficulty is the preparation of high-quality piezoelectric films of thickness of few or few tens of micrometers convenient for such applications (problems with ultrasound cross-talk). Further, as resonant frequency of the film increases, the size of a single micro-transducer decreases to size that makes traditional mechanical cutting techniques inapplicable. Recent studies show drawbacks of thinned bulk ceramics over piezoelectric films [9-11]: in the piezoelectric films higher vibration amplitudes can usually be present, with smaller hysteresis, and the films can produce higher energy densities with lower power requirements. Thick films of lead magnesium niobium titan-ate (PMN-PT) have superior piezoelectric and dielectric constants when compared to zinc-oxide (ZnO) and lead zinc titanate (PZT) [12-19], distinguishing them as the main candidates for high-frequency ultrasound transducers. In this paper we show a finite element modelling (FEM) analysis of different configurations of metallic electrodes deposed on a thick piezoelectric film. Each electrode with the piezoelectric film beneath is considered as an ultrasound micro-transducer. The modelling is based on properties of PMN-PT film available in our laboratory and can be used for experimental realization of studied models. 2 Sample properties The acoustically active basis for the FEM analysis presented here is a set of PMN-PT (Pb(Mg1/3Nb2/3)O3-PbTiO3) thick films. Films were deposited by screen-printing at the Jožef Stefan Institute, Ljubljana, Slovenia (details of film preparation are given on [20-22]). Fig. 1 shows a cross section of the film imaged by a FEI Apreo scanning electron microscope. The films thicknesses are around 30 mm, with the average grain size of 5 mm. For the electrical characterization we used a vector network analyzer Bode 100 of Omicron Lab. Fig. 2 gives the electrical impedance Z (top) and the phase angle f (bottom): Q = arctan Im (Z ) Re (Z ) (1) where Im(Z) and Re(Z) are the imaginary and real parts of the electrical impedance, respectively. The impedance is measured on the whole sample area. Due to structural homogeneity of the active layer (see Fig. 1), we assume that electrical properties are homogenous as well. It shows broad antiresonance-resonance peaks at 1.7 MHz and 28.5 MHz respectively, that indicates weak electromechanical coupling. Resonant frequency of 28.5 MHz is used in the FEM analysis presented later in the text. Models used for the FEM analysis are based on four samples of phased array ultrasound transducers on a piezoelectric thick films, all made with 16 electrodes. The layout of the samples is shown in Figure.3. Figure 1: A scanning electron microscope image of the cross-section of the PMN-PT film. The material properties of the phased array ultrasound transducer on a piezoelectric thick film and other geometrical parameters are given in Table.1. Table 1: Phased array ultrasound transducer parameters. LayerlMaterial Function Width Length iThickness 1 AI2O3 Substrate 5,4 mm 6,0 mm 3,0 mm 2 Au Ground 5,4 mm 6,0 mm 10 pm 3 PMN-PT Piezoelectric 5,4 mm 6,0 mm 30 pm 4 AI Electrode 10 pm 4,0 mm < 10 pm 12 R. Hemalatha et al; Informacije Midem, Vol. 49, No. 1(2019), 11 - 18 a) b) Table 2: Electrodes arrangement on the transducer samples Figure 2: Frequency dependence of the electrical impedance (top) and the phase angle (bottom) of the tested PMN-PT film. Broad resonance-antiresonance frequency interval indicates weak electro-mechanical coupling. Figure 3: Phased array ultrasound transducer on a piezoelectric thick film layout The main difference between the four models is in the electrodes arrangement. For example, the samples differ in pitch, aperture, etc. These parameters have critical influence on transducers performance; they are shown in Table 2. S -V- Illlllll ® "p ~~g~ A W A p g e Sample 1 4 mm 0,310 20 10 10 mm ^m ^m ^m Sample 2 4 mm 0.385 25 15 10 mm ^m ^m ^m Sample 3 4 mm 0,460 30 20 10 mm ^m ^m ^m Sample 4 4 mm 0,610 40 30 10 mm ^m ^m ^m 3 Results of ffem analysis 2D model set-up is a multilayer structure with cross-section arranged in the same way as the model from Figure 3, while electrode-arrangement dimensions are as specified in Table 1. Acoustic, piezoelectric, damping, dielectric and other properties of materials used are predefined in PzFlex material database [23]. A 2D model was set up to simulate the propagation of sound waves through a 3mm water column, with the central frequency being 28.5MHz and the amplitude peak being 100V. The analysis showed weak focus- 3.14E+-07 2.44E+0B 1 80E+07 1 60E+07 1.40E+07 ■ 180E+07 1 60E+07 1.40E+07 12UE+07 1.00E+07 1 20E+07 1.00E+07 8.00E-H06 8.00E-K)6 6.00E-H06 6.00E+06 4.00E+-06 4.00E+06 2.00E+-06 2.00E+06 O.OOE-hOO O.OOE-hOO a) b) Figure 4: Maximum acoustic pressure of Sample 1 configuration: a) focusing b) beam steering. Color scale values are in Pa, while model domain dimensions are 2x8 mm. 12 R. Hemalatha et al; Informacije Midem, Vol. 49, No. 1(2019), 11 - 18 ing and good beam steering (25°) properties of these transducers. Bad focusing properties are visible in maximum acoustic pressure field graphic view (see Figure 4a), which shows a weak pressure field under the transducer and a lack of focus. The focusing of the passed array transducer was simulated by delaying the signal excitation on electrodes and the focal point was set to 3mm depth on the bottom of the water column, but the simulation results differ. The weak focusing of the passed array transducer can be verified by calculating its near-field value, because the near-field gives the maximum depth for the usable focus for a given passed array configuration. Near-field values are given by the following equation: D2 f N =—J-[mm\ (2) 4c where: D = np [mm] for active phased array axis D = W [mm] for passive phased array axis n - electrode number W- passive aperture [mm] f - frequency [Hz] c - speed of sound through material [mm/s] From Equation (2) it is calculated that the near-field value on the passive axis (i.e. the axis that cannot be focused) is Np = 77.03mm, but the near-field value on the active axis, depending on a model, is Na1=0.5mm (for p=20pm), Na2=0.77mm (for p=25pm), Na3=1.11mm (for p=30pm) and Na4=1,97mm (for p=40 urn). Near-field values on the active axis clearly show weak focusing capabilities of the current transducer setup, which needs to be improved. Bad focusing properties also affect the beam steering because the beam dissipates and widens after the focal point. The tested transducer setups have pronounced side lobes and there is a grating lobes formation at higher pitch values (30pm and 40pm). The side lobes are produced by an acoustic pressure leaking from probe elements at a different angle. Grating lobes are generated by the acoustic pressure due to even sampling across the probe element and they can be reduced by alternating the probe pitch, and keeping it below A/2 value, if possible. 3.1 Modifying transducer setup Referring to previously shown results, it is obvious that the main point of improvement is the focusing capability. Improvement of this capability can be done by modifying the electrodes arrangement. This can be done by increasing the electrode width (e) in some degree, because the electrode width affects the pitch (p) and the increasing of the electrode spacing (g) has an effect on the pitch. Changing pitch values is limited because it has a great impact on the grating lobes. The next option would be increasing the number of electrodes (n), which means going from 16 element phased array to 32 or 64 elements, and as well the electrode length should be corrected to balance the passive and active phased array axis. To limit the grating lobes, the pitch should be p<1/2, but the general rule allows a pitch value up to p<0.67l. Respecting this pitch limitation, near-field values are calculated for 32 and 64 elements electrodes configuration. The calculated values are shown in Table 3. Table 3: Data calculated for different passed array transducer configurations. n p [pm] e [pm] g [pm] A [mm] W [mm] Na [mm] Rule 32 25 10 15 0.785 0.8 3.1 p> A) but focusing capabilities were poor. The 1 passive ' 3 1- r- 64 electrodes configuration produced smaller pressure values (Figure 5) but it had much better-focusing capabilities, and electrodes length was corrected on this configuration (W = A). It is important to mention passive that pressure values will also change with different focusing depths. duced crosstalk. To our estimate, pitch of 100 mm will lead to better transducer performance regarding the quality of acquired signals. TP 2 60E+05 9.00E+i>3 a.OOE+33 7.00E+03 G.OOE+Û3 5.00E+i>3 4 00E+03 3.00E+i>3 2.00E+33 1JDOE+03 O.OOE+OO Figure 5: Maximum acoustic pressure of n=64, p=30 passed array transducer configuration. Color scale values are in Pa, while model domain dimensions are 10x10 mm. This configuration also has a pronounced grating lobes formation because of a bit higher pitch value. To reduce this by keeping the pitch below A/2 and to keep the focusing capabilities at least above 15mm it is necessary to further increase the electrodes number above, an already high, 64, compared to 16 electrodes at the start. Also with the 64 electrodes configuration, the transducer is still relatively compact in size, which brings benefits regarding possible applications. The 64-electrodes configuration has better beam formation and better-focusing capabilities in comparison with 16 electrodes configuration. However, the sensitivity of both transducer configuration is poor. Due to a small pitch value (i.e., close electrode placement), which will provide a better beam formation and less scattering of the generated acoustic wave in water column, we have very pronounced crosstalk that affects transducers sensitivity in a way that reflections from barrier cannot be differentiated. This is visible on Figure 6, where each colored line represents the received signal of the one of 64 elements. The difference between frontwall and backwall of the barrier should be much more pronounced. An increase of pitch value will result in more pronounced scattering of the acoustic wave, but with re- Figure 6: Crosstalk on received signal from a 0.450 mm thick barrier inside water column (for 64 electrodes configuration, pitch is 30 pm). 4 Conclusions After conducted FEM simulations it is possible to conclude that the electrode pattern of considered transducers need at least 64 electrodes to obtain an optimal performance of a high-frequency miniature phased array ultrasound transducer on a PMN-PT thick piezoelectric film of central thickness mode vibration frequency of around 28.5MHz. If one considers potential applications of this kind of transducers, in ophthalmo-logical diagnostic tools for example, it is shown here that weak and technically unusable phased array transducer properties of a 16-electrodes configuration cannot probe the front part of an average eyeball, with a diameter around 24 mm. The 64-electrode phased array configuration of a thick PMN-PT piezoelectric film of central thickness mode vibration frequency close to 30MHz could theoretically achieve a full depth ultrasound diagnostics coverage of an average human eye. 5 Acknowledgments Ante Bilušic wish to thank to Dr Barbara Malič, Jožef Stefan Institute, Ljubljana, Slovenia for providing PMN-PT samples. This research was partially supported under the project MEMSplit, Contract Number: RC.2.2.08-0052, a project funded by the European Union through the European Regional Development Fund - the Operational Programme Regional competitiveness 2007 - 2013 (RC.2.2.08). 12 R. Hemalatha et al; Informacije Midem, Vol. 49, No. 1(2019), 11 - 18 6 References 1. J.M. Cannata, J.A. Williams, Q.F. Zhou, T.A. Ritter, K.K. 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FlexFA, PzFlex 2017 or OnScale platform; https://support.onscale.com/hc/en-us/ articles/360015260431-2-Materials-Geometry, https://support.onscale.com/hc/en-us/ articles/360007367631-4-Materials. mons Attribution (CC BY) License (https://creativecom-mons.org/licenses/by/4.0/), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Arrived: 31. 08. 2018 Accepted: 22. 01. 2019 © ® Copyright © 2019 by the Authors. This is an open access article distributed under the Creative Com- 12 lO Original scientific paper https://doi.org/10.33180/InfMIDEM2019.102 Informacije IMIDEM Journal of Microelectronics, Electronic Components and Materials Vol. 49, No. 1(2019), 11 - 18 A Memetic based Approach for Routing and Wavelength Assignment in Optical Transmission Systems R.Hemalatha, R.Mahalakshmi Kumaraguru College of Technology, Department of EEE, Coimbatore, India Abstract: In optical networks, Routing and Wavelength Assignment (RWA) problem is one of the major optimization problems. This problem can be solved by different algorithms such as Genetic Algorithm (GA), Artificial Bee Colony (ABC), Ant Colony Optimization (ACO), etc. Shuffled Frog Leaping Algorithm (SFLA) is implemented in the proposed work, to solve the RWA problem in long-haul optical networks. The goal is to use minimum number of wavelengths and to reduce the number of connection request rejections. Cost, number of wavelengths, hop count and blocking probability are the performance metrics considered in the analysis. Various wavelength assignment methods such as first fit, random, round robin, wavelength ordering and Four Wave Mixing (FWM) priority based wavelength assignment are used in the analysis using SFLA. Number of wavelengths, hop count, cost and setup time are included in the fitness function. The SFLA algorithm proposed, has been analyzed for different network loads and compared with the performance of genetic algorithm. Keywords: ACO, GA, RWA, SFLA Memetični pristop za usmerjanje in dodeljevanje valovnih dolžin v optičnih prenosnih sistemih Izvleček: V optičnih omrežjih je največji problem optimizacije usmerjanje in dodeljevanje valovnih dolžin. Problem je rešljiv z uporabo različnih algoritmov, kot so genetični algoritem (GA), umetna kolonija čebel (ABC) in optimizacija kolonije mravelj (ACO). V članku je, za reševanje problema RWA v optičnih omrežjih na dolgih razdaljah, implementiran algoritem mešanega žabjega skakanja (SFLA). Cilj je uporabiti najmanjše število valovnih dolžin in zmanjšati število zavrnitev zahtevkov za povezavo. Stroški, število valovnih dolžin, število preskokov in verjetnosti blokiranja so parametri analize uspešnosti. V analizi se z uporabo SFLA uporabljajo različne metode določanja valovnih dolžin, kot so prvo prileganje, naključno, krožno določanje valovnih dolžin in dodelitev valovne dolžine s štirimi valovnimi mešanji (FWM). Predlagani algoritem SFLA je bil analiziran za različne obremenitve omrežja in primerjan z učinkovitostjo genetičnega algoritma. Ključne besede: ACO, GA, RWA, SFLA * Corresponding Author's e-mail: hemalatha.r.ece@kct.ac.in 1 Introduction In long-haul, high capacity communication networks, Optical systems and networks are vital. The optical data is routed at intermediate nodes, depending on their wavelength (Le et al 2005 and Bisbal et al 2004). Different optical components are used to regulate the data traffic and to direct it to the end user like optical splitters / combiners being used to separate the optical signals and collect them as they propagate through the network (Ramaswami & Sivarajan 2000). Wavelength based services like routing and grooming are the provided by optical networks. Transmission capacity and communication range are better in optical fiber communication (Vidmar 2001).Transferring more information with minimum equipment is the goal of an optical communication system (Batagelj 2014). The capacity of optical system can be improved by Wavelength Division Multiplexing (WDM). These systems and networks make use of the features of optical fibers and WDM components. Different problems that persist in optical wavelength division multiplexing are optimal routing, traffic grooming and wavelength assignment, survivability and Quality of Service (QoS) R. Hemalatha et al; Informacije Midem, Vol. 49, No. 1(2019), 11 - 18 problems (Bhanjaa and Mahapatra 2013 and Adhya and Datta 2009). More computational time is involved in solving these problems using conventional methods (Wang et al 2014 and Triay et al 2010). Selecting a suitable path and allocating a available wavelength for an optical connection results in the problem called Routing and Wavelength Allocation (RWA) problem (Srinath & Janet 2013). To solve the RWA problem, which are in real- world optical networks, Multi-objective evolutionary algorithms based on swarm intelligence are used (Kavian et al 2013 and Largo et al 2012). Also Genetic Algorithm is used in many application due to less complex computation (Bajak et al 2014). Shuffled Frog Leaping Algorithm is used to solve this RWA problem in the proposed research. Certain simpler or similar algorithms lead to poor performance or are too complex to be used. Therefore, a computationally feasible algorithm is used for a good performance of the network. In this research paper, two optimization algorithms -genetic algorithm and shuffled frog leaping algorithm are used in the routing and wavelength assignment problem model. In variety of fields, Genetic Algorithm is used to solve many problems and hence comparison between these two algorithms are done. The simulation results and analysis are discussed and the conclusions of the study and possible future work are presented. 2 Routing and wavelength assignment In dynamic routing and wavelength assignment, the requests for lightpath will arrive dynamically. Wavelength continuity constraint is that, on all the links in its path, a lightpath should use same wavelength. The time for which a lightpath and the required resources remain occupied is called as holding time. When the holding time expires, the resources allocated are made free and are made available to support other lightpath requests. The RWA model involves a network model, routing model, wavelength assignment model and an optimization algorithm (Bhanjaa et al 2013). Routing and Wavelength Assignment model with optimization is shown in Fig. 1. Figure 1: Block diagram of an RWA model with optimization 2.1 Network and Routing Model A network which contains N number of nodes can be modeled as a graph NG(R,E), where E denotes the set of edges representing the connectivity between the nodes and R represents the set of nodes like routers or switches. It is assumed that the links between the nodes are bidirectional. National Science Foundation Network (NSFNET), Advanced Research Projects Agency Network (ARPANET) and European Optical Network (EON) are few standard network architectures currently in use. One of the major problems in optical networking is Routing and Wavelength Assignment (RWA). The goal is to reduce the rejection of connection requests i.e. to maximize the number of optical connection. For every connection request, a particular route and a wavelength should be assigned. If wavelength converters are not used in the network, then same wavelength should be used throughout the path. Same optical link may be shared by two connections requests, if different wavelengths are provided (Bhanjaa et al 2012). Fitness function to be maximized is given by W, gx(j),gx(j+i) (i,j y=E + wx + ^ + X HX + Tx 0) fx kx -1 j=1 Wx is the free wavelength factor. The value of this factor is one, if same wavelength is available in all the links of path x or otherwise, zero. In the first term, the summation defines the total link cost of the path and similarly in the second term, the summation represents the total number of hops in the path. If link (i, j) is a part of path x, the variable Hx takes the value of one and otherwise, it is zero. The set up time of the path x is represented by the variable Tx. Variable Kx represents the length of the x-th chromosome or number of memeplexes. The route is optimal when the objective function maximizes with the following constraints being satisfied. X 7j- X 7?=1 if i=S, lp TLP (2) X 7j- X 7j=-1, if i=D, lpTLP (3) (i,j )e E (( >!> E X 7 j - X t'i = 0, if i*S, i*D, lpTLP (4) 0'.j> E (j ,!> E y i,p < i j ] , if i*D, lpTLP (i,] )=£ X = 0 j 1 , if i=D, lpTLP X h0, for t < T (i, j (5) (6) (7) 12 R. P. Nelapati et al; Informacije Midem, Vol. 49, No. 1(2019), 25 - 32 h < X It £ (N -1), for t > T (8) ( i ,j )e£ Equations (2) to (6) represent the flow conservation constraint. Equations (7) and (8) represent the hop count constraint. 2.2 Wavelength Assignment Model First fit and Random fit are the wavelength assignment techniques are the generally used techniques. First Fit method chooses the available wavelength with the lowest index whereas random fit method identifies the available wavelengths and chooses one amongst them in a random manner. For both the algorithms, O(w) is the complexity and w indicates the number of wavelengths. First Fit performs better than Random Fit. Other wavelength assignment techniques such as round robin technique, wavelength ordering technique and Four Wave Mixing aware wavelength assignment technique are also used for the analysis. One of many fiber nonlinear effects is a four-wave mixing (FWM) phenomenon (Batagelj et al 2004 and Batagelj & Vidmar 2002). When more than two wavelengths of light interact with each other while propagating through the medium, a spurious component is produced. Since the FWM crosstalk power will be more over the center of transmission window, in the FWM aware wavelength assignment technique priority is given to the wavelengths towards the edges of the transmission window. Complexity of this method is O(N3log2N), where N is the number of nodes in the network. In the fitness function proposed, Wx the free wavelength factor is updated after the wavelength assignment phase. In the wavelength assignment model, if the link (i, j) is used by the lightpath lp, the variable Iijlp assumes one else it assumes zero. Variable Iijwlp is the lightpath wavelength indicator. It shows whether the lightpath lp uses wavelength 'W' on link (i, j). Variable Iijwlp(x,y) is the lightpath wavelength link indicator and this is one when the lightpath uses wavelength 'W' on link (i, j) between the nodes x and y. l(x,y) takes one if a physical link exists between the nodes x and y (Bhanjaa et al 2010). The wavelength continuity constraints are W-1 W-1 W-1 ijw I = X I - V (¡.j) (9) w=0 < Ijw-V (i,j), V (x-y) - V w (10) (11) =ij-y=j (12) Xjlp(X,*) < 1 V -1 - V (x-y)- v W i ,j W-1 XX j"""'1 """-—C"''"■ " = -y=i (13) w=0 x w=0 x W-1 W-1 XZC^ -ZZ7!^,x) = °-y*i-y*j(14) w=0 x w=0 x 3 Optimization algorithms 3.1 Genetic Algorithm The flow involved in Genetic Algorithm is shown in Fig.2. Initial population is created and it works itera-tively on this initial solution set. The algorithm converges to arrive on best solution (Kavian et al 2009). Chromosome is the route or path encoded from source to destination. A sequence of nodes creates each chromosome and is generated based on the topology of a particular network. Each chromosome may be of different length and each of them encodes the path from the sender node S to the receiver node D. By random selection of solutions- initial population is created. The initial population has only one chromosome. Position of the nodes in routing paths do not affect the crossover. One pair is randomly chosen and the crossing site of each chromosome is identified by the locus Figure 2: Flowchart of GA 13 R. P. Nelapati et al; Informacije Midem, Vol. 49, No. 1(2019), 25 - 32 of each node. The crossing points of two chromosomes may be different from each other (Ahn and Ramakrish-na 2002). During mutation, the mutation site of the parent chromosome is chosen randomly. Based on the topology database, different path is chosen from the mutation site to the destination. The fitness function is formulated as in equation (1) and is to evaluate the quality of the chromosomes. 3.2 Shuffled Frog Leaping Algorithm Shuffled Frog Leaping Algorithm (SFLA) is a meta-heu-ristic algorithm inspired by nature. Novelty of this algorithm is its fast convergence speed (Hemalatha and Mahalakshmi 2017). Various other factors that cause latency or delay in the optical network at the physical layer are the optical fiber, optical amplifiers and other modules in the network out of which the propagation delay caused by the fiber is more predominant (Eržen and Batagelj 2015). Advantages of both the genetic-based memetic algorithm and the behavior-based Particle Swarm Optimization (PSO) algorithm are combined together in SFLA. SFLA combines the benefit of the local search tool of Particle Swarm Optimization (PSO) and the idea of mixing information from parallel local searches, to move towards a global solution (Muzaffar et al. 2006). In the SFLA, group of frogs that define possible solutions are referred to as population. These groups of frog are partitioned into several communities and are called as memeplexes. Each frog in the memeplexes perform local search. Behavior of each frog within the memplex influences the behavior of the other frogs and through a process of memetic evolution it is developed. After a certain number of memetic evolutions, the memeplexes are forced to mix together and through shuffling process, new memeplexes are formed. Until convergence criteria are satisfied, the local search and the shuffling processes continue. The flowchart of Shuffled frog leaping algorithm is illustrated in Fig.3 (Roshni et al 2016). The steps involved are given as below: a) SFLA involves a population 'P' of possible solution, defined by a group of virtual frogs(n). Frogs are sorted in descending order based on their fitness and partitioned into subsets called as memeplexes (m). Frog i is expressed as X. = (Xi1, Xi2,.....Xi3) where X represents number of variables. Frogs with worst and best fitness are identified as Xw and Xb within each memeplex. Frog with global best fitness is identified as Xg. The frog with worst fitness is improved based on the following equation. b) c) d) e) f) Start Initialize parameters: Population size (P) Number of memeplexes (m) Number of iterations within each memeplex Generate random population of P solutions (frogs) Calculate fitness of each individual frog Sorting population in descending order of their fitness Divide P solutions into m memeplexes Local Search Shuffle evolved memeplexes Yes Determine the best solution i End Figure 3: Flowchart of SFLA 13 R. P. Nelapati et al; Informacije Midem, Vol. 49, No. 1(2019), 25 - 32 D=rand() (Xb -XJ ( X =X + D neww oldw i 15) eluded in the fitness function. The shuffled frog leaping algorithm has a better fitness compared to the genetic (16) algorithm. Rand() is a random number in the range of [0,1] (Muzaf-far 2006). D, is the step size of i-th leaping frog and Dmax is the maximum step size allowed. If the fitness value of new Xw is better than the current one, Xw will be accepted. Otherwise, the calculated step size of leaping frog D. and new fitness X are recomputed with Xu replaced neww ~ b r by Xg. Further if no improvement is achieved, a new Xw is generated randomly.The update operation is repeated for specific number of iterations. After a predefined number of memetic evolutionary steps within each memeplex, the solutions of evolved memeplexes are replaced into new population. This is called shuffling process. Global information exchange among the frogs is promoted by the shuffling process.The population is then sorted in order of decreasing performance values and updates the population based on best frog's position, repartition the frog group into memeplexes and progress the evolution within each memeplex until the conversion criteria are satisfied (Samuel and Rajan 2014). The mean blocking probability against number of generations for GA and SFLA with 4 number of channels fand a load of 10 Erlangs are shown in Fig.5 and 6 respectively. By comparing both the figures, its is clear that the blocking probability is lesser in SFLA than in GA. Among the three wavelength assignment techniques Round robin Technique has the least blocking probability. . GMielic AfgoHlhm I 1,4 - Fittl f=ll - Psivknn RnunC lübin i i J J S 5 ? a fluiliim 4 Simulation results The optimization algorithms have been implemented using the software MATLAB. Simulations are carried out for a 14 node network having 21 bidirectional links similar to NSFNET network topology. The fitness against the execution time for the genetic algorithm and shuffled frog leaping algorithm with 4 number of channels fand a load of 10 Erlangs is shown in Fig.4. Number of hops, holding time and cost are the paramateres in- io: Gono-tic Algoothm - Shuffled Froo LMwrxi AJowithm Figure 5: Mean blocking probability against number of generations using GA £tnrihd Frog Leaping AHprfhrn 10° it) ¿1 6 a ft. Figure 4: Fitness function of GA and SFLA Figure 6: Mean blocking probability against number of generations using SFLA For different wavelength assignment techniques first fit, random, round robin, wavelength ordering and FWM aware priority based wavelength assignment, the rate of convergence of genetic algorithm and shuffled frog leaping algorithm with 4 number of channels fand a load of 10 Erlangs is shown Fig.7. By randomly selecting an individual and choosing the best fitness 13 R. P. Nelapati et al; Informacije Midem, Vol. 49, No. 1(2019), 25 - 32 value, the graphs are plotted. The average fitness score decreases, as the generations increase. For both GA and SFLA with different wavelength assignment techniques, the average fitness score is approximately the same. Among all the wavelength assignment techniques, FWM priority based assignment has a better average fitness score. f 1er I - FifalFil - HürtJan RnundrDön rtirtletigih cideting - FWM pnionLy iiirqii 11È11* — -hH- -~- - -e- -si- -Sä— —^ GinrfiUD Figure 7: Average fitness score for GA and SFLA The experimental results of mean execution time obtained for different wavelength assignment techniques First Fit, Random, Round Robin, Wavelength Ordering and FWM aware priority based wavelength assignment using GA and SFLA for various network load in Erlangs is as ahown in Table 1. The mean execution time (sec-onds)varies appropriately with the network loads and is observed that FWM aware priority based wavelength assignment technique requires very minimum mean execution time in both GA and SFLA algorithms for various network loads. When SFLA is compared with GA, SFLA requires minimum mean execution time for all the wavelength asignment techniques. The imrpovements achieved in the mean execution time while using SFLA compared to GA is showm in Table 2. The experimental results are quantified using t-test to show the improvements in the proposed SFLA algorithm. The parameters t and p-value are dimen-sionless. The p-values obtained for all the wavelength assignment techniques are less than or equal to the level of significance value 0.05. This shows that the mean execution time is lesser for the proposed shuffled frog leaping algorithm compared to genetic algorithm. 5 Conclusions One of the complex optimization problems in optical networks is Routing and Wavelength Assignment Table 1: Mean Execution Time for different wavelength assignment techniques using GA and SFLA Wavelength Mean Execution Time for various network Assignment loads(Erlang) using GA in seconds Mean Execution Time for various network loads(Erlang) using SFLA in seconds Techniques 0 0.7 2.0 3.3 4.6 0 0.7 2.0 3.3 4.6 First Fit 0.1200 0.0241 0.0537 0.1024 0.1029 0.1191 0.0232 0.0504 0.1019 0.1003 Random 0.3000 0.2462 0.2398 0.3071 0.3824 0.2987 0.2451 0.2369 0.3042 0.3736 Round Robin 0.1200 0.1543 0.1597 0.2002 0.2357 0.1198 0.1503 0.1513 0.2001 0.2227 Wavelength Ordering 0.0500 0.0049 0.0108 0.0297 0.0453 0.0490 0.0044 0.0097 0.0281 0.0404 FWM priority based Assignment 0.0050 3.873e-11 7.490e-11 2.0037e-10 3.01e-10 0.038 3.726e-11 7.329e-11 1.998e-10 2.92e-10 Table 2: T-test results showing improvements in Mean Execution Time in SFLA Wavelength Assignment Difference between Mean Execution Time for various network loads(Erlang) of SFLA and GA in seconds Average in seconds Standard Deviation in t p-value Techniques 0 0.7 2.0 3.3 4.6 seconds First Fit 0.0009 0.0009 0.0033 0.0005 0.0026 0.00164 0.001232 2.98 0.02 Random 0.0013 0.0011 0.0029 0.0029 0.0088 0.0034 0.003137 2.42 0.04 Round Robin 0.0002 0.004 0.0084 1e-04 0.013 0.00514 0.005557 2.07 0.05 Wavelength Ordering 0.001 0.0005 0.0011 0.0016 0.0049 0.00182 0.001766 2.31 0.04 FWM priority based Assignment -0.033 1.47e-12 1.61e-12 5.7e-13 9e-12 -0.0066 0.014758 -1 - 13 R. P. Nelapati et al; Informacije Midem, Vol. 49, No. 1(2019), 25 - 32 (RWA) problem. In the proposed work, two optimization algorithms Genetic Algorithm and Shuffled Frog Leaping Algorithm are used to solve the problem. The fitness function minimizes the blocking probability, number of hops and cost. Basic wavelength assignment techniques such as first fit, random and round robin and also wavelength ordering and FWM aware priority based wavelength assignment are used to analyze the performance of the algorithms GA and SFLA. Fitness value achieved is found to be better in SFLA compared to GA. The two optimization algorithms GA and SFLA are compared in terms of mean execution time, mean blocking probability and fitness score. The experimental results show that SFLA has better fitness score, less mean execution time and minimum mean blocking probability. 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Arrived: 12. 06. 2018 Accepted: 24. 12. 2018 13 Original scientific paper Informacije ímidem Journal of M https://doi.org/10.33180/InfMIDEM2019.103 Journal of Microelectronics, Electronic Components and Materials Vol. 49, No. 1(2019), 19 - 23 Design of Low Power and Low Phase Noise Current Starved Ring Oscillator for RFID Tag EEPROM Labonnah Farzana Rahman1, Mamun Bin Ibne Reaz2, Mohammad Marufuzzaman3, Lariyah Mohd Sidek3 institute for Environment and Development (LESTARI), Universiti Kebangsaan Malaysia, Bangi, Malaysia 2Department of Electrical, Electronics and Systems Engineering, Universiti Kebangsaan Malaysia, Bangi, Malaysia 3Sustainable Technology and Environment Group, Institute of Energy and Infrastructure, Universiti Tenaga Nasional, Kajang, Selangor, Malaysia Abstract: Power dissipation of CMOS IC is a key factor in low power applications especially in RFID tag memories. Generally, tag memories like electrically erasable programmable read-only memory (EEPROM) require an internal clock generator to regulate the internal voltage level properly. In EEPROM, oscillator circuit can generate any periodic clock signal for frequency translation. Among different types of oscillators, a current starved ring oscillator (CSRO) is described in this research due to its very low current biasing source, which in turn restrict the current flows to reduce the overall power dissipation. The designed CSRO is limited to three stages to reduce the power dissipation to meet the specs. The simulated output shows that, the improved CSRO dissipates only 4.9 mW under the power supply voltage (VDD) 1.2 V in Silterra 130 nm CMOS process. Moreover, this designed oscillator has the lowest phase noise -119.38 dBc/Hz compared to other research works. In addition, the designed CSRO is able to reduce the overall chip area, which is only 0.00114 mm2. Therefore, this proposed low power and low phase noise CSRO will be able to regulate the voltage level successfully for low power RFID tag EEPROM. Keywords: CMOS, RFID, EEPROM, CSRO, power dissipation Načrtovanje tokovno omejenga oscilatorja nizkih moči in nizkega faznega šuma za RFID EEPROM nalepke Izvleček: Poraba moči CMOS IC je izredno pomembna pri napravah nizkih moči, posebej še pri spominu RFID nalepk. V spošnem, spomin nalepk, kot je elektronsko izbrisljiv in programirljiv EEPROM, potrebuje generator interne ure za reguliranje internega napetostnega nivoja. Poleg številnih tipov osclatorjev je v članku opisan tokovno omejen obročni oscilator (CSRO), saj zaradi omejitve toka, ki zmanjšuje porabo moči. Načrtan CSRO uporablja tri stopnje za doseganje specificirane porabe moči. Simuliran oscilator potrebuje 4,9 mW pri napajalni napetosti 1,2 V in realizaciji v 130 nm Silterra CMOS tehnologiji. V primerjavi z drugimi oscilatorji ima najnižji fazni šum -119,38 dBc/Hz in majhno površino 0,001144 mm2. Predlagan oscilator je sposoben regulirati napetost EEPROM RFID nalepk. Ključne besede: CMOS, RFID, EEPROM, CSRO, poraba moči f Corresponding Author's e-mail: labonnah.deep@gmail.com 1 Introduction Radio frequency identification (RFID) is a detection system, where communications happen through radio waves to complete the data transmission/ reception process between the reader and tag [1]. In an RFID system, transponder contains an electronic microchip with three main blocks; like front-end digital baseband processor and the memory, where the product information's are stored inside the tag memory. The microchip is fabricated as a low power integrated cir- 21 L. F. Rahman et al; Informacije Midem, Vol. 49, No. 1(2019), 19 - 23 cuit (IC), which employs a memory depending on the device features like ROM, RAM, non-volatile memory (EEPROM, Flash) and data buffers [2-4]. At present, a key design aspect for RFID transponder IC is the low power dissipation and low cost. Therefore, EEPROM is the most used tag memory, which is easily applicable to an RFID tag, DC-DC converter, SOC and FPGA system due to its advantages of low cost, low power and compatibility with the standard CMOS process [1]. In RFID, tag EEPROM, a clock driving circuit is required to maintain the internal voltage regulation. The clock signal in RFID systems is generated using a low power on-chip oscillator. In EEPROM, the oscillator is the major circuit that is required to generate a clock signal internally to regulate the voltages. Generally, the output frequency of the oscillator is a linear function of its control voltage. Therefore, the output frequency should be a function of the control voltages, which has a tunable range [5]. Among all the voltage-controlled oscillators (VCOs), current-starved ring oscillator (CSRO) has the popularity due to their easy integration. Moreover, this CSRO is an essential building block in EEPROM, which is commonly used in the clock generation. This internal clock generation is required to provide the input clock signals for voltage boost up the process. In addition, a very low current biasing source is required in CSRO to restrict the current flows in inverters inside the oscillation process to reduce the power dissipation [6]. This paper presents an improved CSRO circuit, which is suitable for the EEPROM voltage regulator in RFID tags. The design of a CSRO involves many important factors like frequency, power dissipation, chip area, phase noise etc [6]. Therefore, the design method of CSRO is discussed in this research, illustrates a three-stage CSRO. This paper is organized with the design method of the CSRO followed by the results and discussions. Finally, the comparison table is presented to show the better performance results compared to other research works. through the inverters, which limits the current flow and reduces the power dissipation. A typical ring oscillator is constructed with a number of delay stages, where the output of the last stage feedback to the input of the first stage. In this scheme, the rings need to generate a phase shift of 2n, which should have the unity voltage gain in the oscillation frequency. In this research, a three-stage CSRO is proposed as shown in Figure 1, which follows the same operating phenomenon. Figure 1: Schematic diagram of the proposed CSRO MN1/MP2 is used to act as an inverter in the proposed design. On the other hand, MN2/MP2 acts as the mirror current source to limit the current flow through the inverter MN1/MP1. MP0, MP7, MN9, MN10 and MN11are required constructing a biasing circuitry for the oscillator. In this design, MP7/MN11 has the equal drain current, which is controlled by the input voltage VCON-TROL and is mirrored to each level of the oscillator. In this proposed oscillator, an input pin EN is embedded with the main circuitry, which generates the reset signal for the chip. Moreover, when a power failure occurs from a certain level, this EN pin disconnects the chip. If the power supply voltage exceeds the required threshold, this EN pin generates a command signal to enable the chip operation. Therefore, the overall frequency of the proposed oscillator can be defined by the following equation. f = 1 Ir NTn NCequVDD (1) 2 Methodology The memory of the RFID transponder requires a clock driving circuit to provide the clocks for the charge pump/voltage boost up circuit. The clock signal in EE-PROM is generated using either the incoming carrier or an on-chip block [6]. Therefore, a ring oscillator is essential to get the low power on-chip and stable clock signals for RFID transponders memory performances. Moreover, a very low current biasing source is allowed where, N is the stage number, TD is the delay, Cequ is the single stage output equivalent capacitance, and VDD is the supply voltage. In this proposed work, a three-stage CSRO is illustrated where some current starved inverters are involved to generate the oscillation frequency. In addition, to provide the bias current to the delay elements, an internal biasing circuitry with power switching in the conventional design is biased through this internal bias unit. This biasing circuitry delivers a range of control 20 L. F. Rahman et al; Informacije Midem, Vol. 49, No. 1(2019), 19 - 23 voltages and helps to enhance the biasing voltage of the CSRO with maximum voltage variation, which ultimately elevates the sensitivity of the CSRO by engendering greater oscillation frequencies. On the other hand, designing a CSRO with frequency stability against temperature variation is another challenging task. Mostly, the threshold voltage in MOS transistors is one of the temperature dependent factors, which affects the oscillation frequency. As a result, to overcome this problem, the designed CSRO need to be controlled by a temperature independent source. Therefore, in this proposed design, a biasing unit is involved that generates the control voltage to the CSRO with minimum threshold voltage dependency and minimum temperature dependency. 3 Result and discussion The proposed CSRO is designed and simulated in Mentor Graphics tool using Silterra 130 nm CMOS Process. To determine the operating frequency of the proposed CSRO circuit, the pre-layout simulated output frequency of the CSRO is shown in Figure 2. The operating temperature of the circuit is set to 27 0C. Figure 2: The simulated output of the proposed CSRO From Figure 2 it is shown that, the proposed CSRO is achieved 10.2 MHz frequency when the control voltage is set to 1.2 V. The different transistor sizes of the proposed CSRO make it possible to get this desired frequency from the power supply voltage at 1.2 V. The operating temperature of the circuit is set to 27 0C. It is also illustrated from the figure that, the pre-layout simulation results also able to provide a full-swing oscillation signal with a supply voltage of 1.2 V. To validate the proposed CSROs frequency range the design is simulated at different control voltages. Figure 3 shows the frequency deviation of the proposed CSRO circuit in terms of power supply deviations. Applying a range of power supply variation generates a frequency variation from 7 MHz to 11 MHz as shown in Figure 3. In this proposed design, it is observed that a non-linear relationship has been established due to the sensitivity of output frequency with respect to power supply variations. However, designing a CSRO with frequency stability against temperature variation is another challenging task Figure 3: Tuning range of the proposed CSRO at 27 0C As the improved CSRO is aimed to offer low power dissipation, the result shows that the power consumption of this design is only 4.9 ^W. This result is superior to any recently published research works for RFID transponders memory clock generation. In our design, we have achieved a single side-band phase noise of -119.38 dBc/Hz at a 1MHz offset from the carrier as shown in Figure 4. Figure 4: Single sideband (SSB) phase noise (PN) of the CSRO In this design, a statistical analysis named Monte Carlo simulation is needed to calculate the impact of transistor and process variation mismatch. Therefore, a Monte-Carlo simulation with 100 runs is performed to validate the impacts. The results, shown in Figure 5, reveal that the designed current starved oscillator has an average frequency of 10.66 MHz with a standard deviation of 0.375 MHz. 20 L. F. Rahman et al; Informacije Midem, Vol. 49, No. 1(2019), 19 - 23 22.0 20.0 18.0 16.0 14.0 n 12.0 > 8.0 e.o 4.0 9.8MEG 10.0MEG 10.2MEG 10.4MEG 10.SMEG 10.&MEC 11.0MEG 11 2MEG 11.4MEC 11.SMEG 11 X Values Figure 5: Monte Carlo simulations for oscillation frequency for ring oscillator The principle of industry-oriented EDA tools (such as Mentor Graphics, Cadence, etc.) is expected to have the closest simulation result to the experimental result. Here, we have used Mentor Graphics to design, simulate, and draw the layout of our proposed design of CSRO. Therefore, the post-layout simulation will be expected to agree with the actual measurement result after IC fabrication. The layout design (Figure 6) has been sent for fabrication using standard 0.13 ^m CMOS process including PADs and buffer circuit. A layout of the chip is shown in Figure 6, where the CSRO core occupies an area (without PADs) of 0.00114 mm2. In this research, all the transistors have been placed in a way so that the mismatches and the area of the design can be reduced. Figure 6: The layout of the proposed CSRO Table 1 summarizes the performance of the proposed CSRO along with other research works. In this research, a 10.2 MHz clock frequency is required to mitigate the requirements of the low power RFID tag EEPROM memory. Compared to all the research works shown in Table 1, the proposed CSRO has the lowest phase noise -119.38 dBc/Hz, which is the lowest compared to recently published research works with 10.2 MHz oscillation frequency. In addition, the proposed design has the lowest power dissipation only 4.9 pW compared to other research works, which makes the proposed design superior for low power applications. From the comparison in Table 1 it is found that, the proposed design has a small layout area, which eventually reduces the production cost. In CMOS ring oscillators (single-ended or differential); a most common concern is the preferred method to generate better performance in terms of jitter, phase-noise, and total power dissipation. Single-ended CMOS ring oscillators phase noise and jitter are not strong functions of the number of stages [10-12]. However, the design is not done symmetrically or the design produces large noise, then a larger N will reduce the jitter. In general, the choice of the number of stages must be made based on several design criteria, such as 1/f noise effect, the desired maximum frequency of oscillation, and the influence of external noise sources. 4 Conclusion An improved low power, low phase noise current-starved ring oscillator is presented in this research works. The design has only three inverter stages with the internal biasing method, which is required lower power, compared to other research works. The statistical analysis shows that the modified oscillator is able to produce the desired clock signal properly with different transistor sizing. Moreover, the comparison study shows that, the design has a lower phase noise -119.38 dBc/Hz@1 MHz offset from the carrier frequency. In addition, the simulated output shows that, the improved CSRO consumes only 4.9 ^W power under supply voltage (VDD) 1.2 V in Silterra 130 nm CMOS process, which Table 1: Performance comparisons of CSRO References Process Power Supply Frequency (MHz) Pdc, core Phase noise (dBc/Hz) (pm) (V) (MW) [5] 0.13 1.3 28.2MHz-3.5GHz 590.88 -118@1MHz [7] 0.18 0-1.8V 25.70 - 222.53 105.2 - [8] 0.13 1.8 15.57 6000 -116.6@1MHz [9] 0.18 1.8 1.02 GHz -3.99 GHz 7490 -80.17@ 1MHz This Work 0.13 1.2 7-11 4.9 -119.38@1MHz 20 L. F. Rahman et al; Informacije Midem, Vol. 49, No. 1(2019), 19 - 23 is the lowest among previous research works. Finally, the working frequency for clock generation, which is 10.2 MHz and the small chip are make this proposed CSRO suitable for the voltage regulation of the low power application like RFID tag EEPROM. 5 Acknowledgements The authors would like to express sincere gratitude to Universiti Kebangsaan Malaysia for supporting this research project through the GUP-2018-141 fund. 6 References 1. Rahman, L. F., Reaz, M.B.I., & Ali, M.A.M. (2011). A Low voltage Charge Pump Circuit for RFID Tag EEPROM, Proceedings of the 4th International Conference on Emerging Trends in Engineering & Technology (ICETET-11), Mauritius, 244-246. https://doi.org/10.1109/ICETET.2011.16 2. Rahman, L. F., Reaz, M. B. I., Yin, C. C., Ali, M. A. M., & Marufuzzaman, M. (2014). Design of High Speed and Low Offset Dynamic Latch Comparator in 0.18 ^m CMOS Process, PloS one, 9(10), e108634. https://doi.org/10.1371/journal.pone.0108634 3. Wei, K. C., Amin, M. S., Reaz, M. B. I., Rahman, L. F., Jalil, J. (2013). Low Voltage Charge Pump Circuit using 0.18 um CMOS Technology, Revue Roumaine Des Sciences Techniques, 58(1), 83-92. 4. Rahman, L. F., Reaz, M. B. I., Chang, T. G., & Marufuzzaman, M. (2013). Design of Sense Amplifier for Non Volatile Memory, Revue Roumaine Des Sciences Techniques, 58(2), 173-182. https://doi.org/10.1109/ICAEES.2016.7888029 5. Varun, J. P., & Mehul, L. P. (2013). Low Power Wide Frequency Range Current Starved CMOS VCO in 180nm, 130nm and 90nm CMOS Technology, International Journal of Engineering Research and Development, 7(4), 80-84 (2013). 6. Maryam, T., & Sotoudeh, H. H. (2013). An efficient 2.4GHz radio frequency identification (RFID) in a standard CMOS process, Canadian Journal of Electrical and Computer Engineering, 36(3), 93 -101. https://doi.org/10.1109/CJECE.2013.6704690 7. Patil, R. K., & Nasre, V. G. (2012). A performance comparison of current starved VCO and source coupled VCO for PLL in 0.18 ^m CMOS process. International Journal of Engineering and Innovative Technology,!, 48-52. 8. Lin, Y. C., Yeh, M. L., & Chang, C. C. (2013). A high figure-of-merit low phase noise 15-GHz CMOS VCO. Journal of Marine Science and Technology, 21(1), 82-86. http://dx.doi.org/10.6119/JMST-011-1230-1 9. Mishra, A., & Sharma, G. K. (2015, December). Design of power optimal, low phase noise three stage Current Starved VCO. Proceedings of the 2015 Annual IEEE India Conference (INDICON), 1-4. http://dx.doi.org/10.1109/INDICON.2015.7443417 10. Cilek, F., Seemann, K., Brenk, D., Essel, J., Heidrich, J., Weigel, R., & Holweg, G. (2008, May). Ultra low power oscillator for UHF RFID transponder. 2008 IEEE International Symposium in Frequency Control, Bangkok, Thailand, 418-421. http://dx.doi.org/10.1109/ISCIT.2006.339969 11. Jalil, J., Reaz, M. B. I., Bhuiyan, M. A. S., Rahman, L. F., & Chang, T. G. (2014). Designing a Ring-VCO for RFID Transponders in 0.18 m CMOS Process, The Scientific World Journal, 2014, 6 pages. http://dx.doi.org/10.1155/2014/580385 12. Hajimiri, A., Limotyrakis, S., &Lee, T. H. (1999). Jitter and phase noise in ring oscillators, IEEE Journal of Solid-State Circuits, 34, 790-804. https://doi.org/10.1109/4J66813 Copyright © 2019 by the Authors. This is an open access article distributed under the Creative Commons Attribution (CC BY) License (https://creativecom-mons.org/licenses/by/4.0/), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Arrived: 08. 08. 2018 Accepted: 15. 01. 2018 20 26 Original scientific paper Informacije (midem Journal of M https://doi.org/10.33180/InfMIDEM2019.104 Journal of Microelectronics, Electronic Components and Materials Vol. 49, No. 1(2019), 25 - 32 Design and Performance Analysis of Hybrid SELBOX Junctionless FinFET Rajeev Pankaj Nelapati, Sivasankaran K. School of Electronics Engineering, Vellore Institute of Technology, Vellore, India Abstract: In this work, the performance of selective buried oxide junction-less (SELBOX-JL) transistor at a FinFET structure is analysed using numerical simulations. The proposed structure exhibits better thermal resistance (RTH), which is the measure of the self-heating effect (SHE). The DC and analog performances of the proposed structure were studied and compared with the conventional and hybrid (or inverted-T) JLFinFETs (JLTs).The ION of the hybrid SELBOX- JLFinFET is 1.43x times better than the ION of the JLT due to the added advantage of different technologies, such as 2D-ultra-thin-body (UTB), 3D-FinFET, and SELBOX. The proposed device is modeled using sprocess and simulation study is carried using sdevice. Various analog parameters, such as transconductance (gm), transconductance generation factor (TGF = gm/IDS), unity current gain frequency (fT), early voltage (VEA), total gate capacitance (C), and intrinsic gain (A0), are evaluated. The proposed device with a minimum feature size of 10nm exhibited better TGF, fT, VEA, and A0 in the deep-inversion region of operation. Keywords: Junctionless FinFET, Hybrid SELBOX-JLFinFET, Self heating, fT, TGF. Analiza zasnove in učinkovitosti hibridnega brezspojnega SELBOX FinFET-a Izvleček: V članku je analiziran brezspojni SELBOX-JL transistor v FinFET strukturi. Predlagana struktura izkazuje boljšo termično upornost, ki je merjena preko lastnega segrevanja. DC in analogne lastnosti predlagan strukture so primerjanes konvencionalnimi in hibridnimi strukturami. Tok hibridnega SELBOX-JLFinFET je 1.43-krat boljši kot pri JLT zaradi uporabe drugačne tehnologije, kot je 2D ultra tanko ohišje, 3D-FinFET in SELBOX. Ocenjeni so številni parametri, kot je transkonduktanca, generacijski faktor transkonduktance, frekvenca tokovnega ojačenja, zgodnja napetost, skupna kapacitivnost vrat in osnovno ojačenje. Ključne besede: Brezspojni FinFET, hibridni SELBOX-JLFinFET, lastno segrevanje, fT, TGF. * Corresponding Author's e-mail: rajeevpankaj@vit.ac.in 1 Introduction Silicon on insulator (SOI) MOSFETs has numerous advantages over bulk MOSFETs such as low parasitics, better isolation, radiation hardness, improved speed, ability to operate at low VDD and higher environmental temperatures [1, 2]. The improved gate control over the channel causes FinFETs to demonstrate reduced short channel effects (SCEs), such as drain-induced barrier lowering (DIBL), when compared to MOSFETs [3,4]. However, the performance of the conventional FinFETs is overshadowed by hybrid FinFETs by effective utilization of the device area. A higher drain current is attained in hybrid FinFET by employing the unused area in conventional FinFET. The added advantages of the SOI and ultra-thin body (UTB) technologies enable the hybrid FinFET to have more drain current for the same fin width (Wfin) and gate length (Lg) when compared to conventional FinFETs. Zhang et al. proposed hybrid FinFET [5] and was later explored by Fahad et al. in [6]. Subsequently, the impact of high-k symmetric and asymmetric spacer, fin shape, and temperature on the performance of the hybrid FinFETs were analyzed by Pradhan et al. [7,8,9,10]; and the effect of self-heating on the performance of hybrid FinFETs was studied by Nelapati et al.[11]. Continuous scaling of electronic devices led to the difficulty of having sharp doping profiles in inversion mode (IM) transistors. Consequently, this led to the invention of the transistor without junctions. Colinge et al. [12] demonstrated a junctionless transistor (JLT), which is free from the junction and any doping gradients. A 27 R. P. Nelapati et al; Informacije Midem, Vol. 49, No. 1(2019), 25 - 32 comparative study of SOI-JLT and bulk JLT was carried in [13]. SOI-JLT is better than the bulk JLT but lacks in thermal conductivity due to the presence of silicon dioxide as a buried oxide. Self-heating in SOI devices can be reduced by replacing silicon dioxide with better thermally conductive materials or by modifying the device structure [14, 15]. Narayanan etal. proposed a modified SOI device structure for reducing the self-heating effect [16]. In this structure, the buried oxide is patterned in the selective region under the source and drain, and not continuously, which is referred to as the SELBOX struc- (a) (b) (c) Figure 1: (a) Coventional JLT (SOI-JLT) (b) HJLT (c) HSJLT. ture. Uzma et al. presented a comparative study of planar SELBOX and SOI junctionless transistors [17]. In this work, we analyzed the performance of hybrid SELBOX-JLFinFET (HSJLT), which is immune to self-heating and delivers higher drain current. The proposed structure adds the advantage of UTB, SOI technology, and SELBOX structure. Figure 1 depicts the 3-D view of conventional JLT, hybrid JLFinFET (HJLT), and HSJLT. The DC and analog performance of HSJLT are evaluated and compared with conventional and hybrid JLTs. The rest of the paper is organized as follows: Section 2 discusses the process flow of the proposed device and the simulation setup. Section 3 discusses the DC characteristics, self-heating effect, and analog performance of HSJLT and the comparison of simulation results with conventional and hybrid JLTs. The conclusions are drawn in Section 4. 2 Process flow and Simulation Setup Figure 2 shows the process flow adopted for modeling the proposed HSJLT using sentaurus process (sprocess) [18]. Silicon material is defined as a substrate with underlying doping of boron (5x1018 cm-3). The insulating material, SiO2, is deposited as a buried oxide on the selective regions by masking. The device structure after the BOX patterning is shown in Figure 2(a). The silicon material for the fin is deposited as shown in Figure. 2(b) with uniform doping of arsenic (1x1019 cm-3 ) and by masking, followed by etching the fin of the transistor is defined as shown in Figure. 2(c). HfO2 is deposited as shown in Figure 2(d), which serves as the gate dielectric. Figure 2(e) shows the device structure after the deposition of the gate metal and spacer material. Finally, the metallization is carried for the contact of the source and drain, as shown in Figure 2(f). Table 1 shows the device specifications and doping profiles of the three devices considered for the simulation. The OFF current (IOFF), of the three devices shown in Figure 1, is adjusted to = 1pA by tuning the gate metal work function (GWF). The GWF for conventional JLT, HJLT, and HSJLT is 4.72eV, 4.87eV, and 4.7eV, respectively. The GWF of HJLT is larger because the ultra-thin body transistor in hybrid devices will be turning on early when compared to fin transistor [6]. The GWF of HSJLT is smaller when compared to HJLT because the planar transistor's gate is depleted in HSJLT by both GWF and the depletion region formed by the oppositely doped substrate [19]. The sentaurus device (sdevice) is used to conduct device simulations [20]. Mobility degradation models, 13 R. P. Nelapati et al; Informacije Midem, Vol. 49, No. 1(2019), 25 - 32 Figure 2: The process flow of the proposed HSJLT using Sprocess, device structure (a) after deposition of the buried oxide (b) after epitaxial growth of silicon for fin (c) after definition of the fin (d) after gate oxide (HfO2) deposition (e) after gate metal and spacer deposition (f) after contact definition such as transverse field (to account for degradation at interfaces), high field saturation (to account for velocity saturation effect), and doping dependence (to account for impurity scattering effect), are considered along with default carrier transport model for the device simulation. Shockley - Reed - Hall (SRH) recombination and Auger recombination models are included to account for the recombination of electrons and holes. Old-slotboom band-gap narrowing model is in- corporated due to the high doping of the channel. The self-heating effect is accounted for by the inclusion of Auger recombination models, SRH (temperature dependent), and the thermodynamic model for carrier transport. The simulator is verified by the excellent fitting of transfer characteristics of SOI junctionless transistor with the experimental data presented in [12]. Figure. 3 shows the calibration of simulation results with experimental data. Table 1: Device parameters and doping profiles. Parameter JLT HJLT HSJLT Gate length (Lg) 20nm 20nm 20nm Fin height (Hfin) 20nm Hfin-UTB=16nm Hfin-UTB=16nm Fin width (Wfin) 10nm 10nm 10nm Effect oxide thickness (EOT) 0.9nm (HfO2) 0.9nm (HfO2) 0.9nm (HfO2) Ultra-thin body (UTB) thickness - 4nm 4nm Spacer length 10nm (HfO2) 10nm (HfO2) 10nm (HfO2) Selbox length (Lselbox) - - 10nm to 40nm BOX thickness 10nm 10nm 10nm Fin dopants (Arsenic) 1 X 1019cm-3 1 X 1019 cm-3 1 X 1019 cm-3 Substrate dopants (Boron) 1 X 1015 cm-3 1 X 1015 cm-3 5 X 1018 cm-3 Gate metal workfunction (GWF) 4.72eV 4.87eV 4.7eV 13 R. P. Nelapati et al; Informacije Midem, Vol. 49, No. 1(2019), 25 - 32 s 3. 5 . 1E-13 -Simulation • Ref. [12] 0.4 0.6 V0S(V) Figure 3: Calibration of lDS - VGS characteristics of the SOI junctionless transistor with the experimental data [12] atVDS= IV and L = 1|jm. 3 Results and Discussions Figure 4 shows a comparison of the transfer characteristics of the three device structures calibrated to the same l0FF Figure 4 shows that the HJLT and the HSJLT deliver maximum drain current due to the added advantage of UTB and fin structures. HSJLT delivers more drain current than HJLT because of the lower threshold voltage (VTH) and low GWF. Figure 4: Comparison of transfer characteristics of SOI-JLFinFET, hybrid JLFinFET, and hybrid SELBOX-JLFinFET at Lccid„v = 20nm, Vnc = 0.8V and calibrated to same btLBUX Ub Urr = IpA. Figure 5 shows the variation of l0N with the increase in Lselbox. Lselbox is the gap between the edges of the BOX material shown in Figure 1(c). As Lselboxincreases, the l0N of the HSJLT decreases due to the penetration of the depletion region into the active area. HJLT is a particular case of HSJLT, in which the Lselbox is zero. In hybrid transistors, the conduction of current is due to UTB transistor and fin transistor, and the UTB transistor turns on earlier than the fin transistor [6]. For the same threshold voltage, the GWF required for HSJLT is lower than the HJLT due to the depletion region provided by the SELBOX structure. Comparatively low GWF of HSJLT makes its fin transistor to turn early when compared to the fin transistor of HJLT, due to which the l0N is less in HJLT when compared to HSJLT for Lselbox being < 40nm. (nm) Figure 5: Variation of ION for different Lselbox of HSJLT at L = 20nm, VDS = 0.8V, and VGS = 0.8V. Figure 6 shows the variation of IOFF and ION/IOFF for different LseLbox. Ioff decreases as LseLbox increases due to the tight control of the GWF at the top and the depletion region at the bottom of the planar transistor [17]. -1.4x10' -1.2x10' -1.0x107 J LT £ a < 3.1 DC performance of HSJLT In this section, the DC performance of the HSJLT is stud ied for different SELBOX lengths (L The variations of ON current (I slope (SS), DIBL, lattice temperature, and RTH in HSJLT are presented for different LSELBOX and compared with the conventional and hybrid JLTs. J LT .SELB0X)atthesameVTH. „), l0FP sub-threshold HJLT ((nm) Figure 6: Variation of IOFF and ION/IOFF for different LS| of HSJLT at L = 20nm, VDS = 0.8V. g ' DS 28 R. P. Nelapati et al; Informacije Midem, Vol. 49, No. 1(2019), 25 - 32 Initially for L, increase in L, 30nm because I SELBOX < 30nm, ION/IOFF ratio increases with an SELBOX and this ratio decreases for Lselbox > drops significantly compared to I Figure 7 and Figure 8 show the variation of the SS and DIBL for different Lselbox of HSJLT. SS and DIBL decrease as the Lselbox increases due to the increase in gate control over the active region caused by an effective increase in the depletion region provided by the SELBOX at the bottom of the UTB transistor. SS and DIBL in HJLT are high because of non-uniform VTH [6]. LSE,.BOx(nm> Figure 7: Variation of SS for different Lselbox of HSJLT at L = 20nm, V = 50mV. lse,.box w Figure 8: Variation of DIBL for different Lselbox of HSJLT at L = 20nm, VD n ' n : 50mV, VD =0.8V. Figure 9 and Figure 10 depict the variation of thermal resistance (RTH) and lattice temperature for different LSELBOX. Thermal resistance can be used to measure the immunity to self-heating of the device; more RTH, less immunity to self-heating. RTH depends on the power dissipated (Pdissipated = VDD x ID) and lattice temperature (Tlattice), as shown in Eq. (1). Thermal resistance and lattice temperature decrease with an increase in L . An increase in LSELBOX results in an increase in the cross - section area for heat to dissipate into the substrate. In conventional JLT, the lattice temperature is lower compared to hybrid SELBOX - JLTs due to the former transistor's low drain current. Rth 410 (Tlattice - 300) P (1) dissipated (nm) Figure 9: Variation of lattice temperature for different Lselbox of HSJLT at Lg = 20nm, VDS = 0.8V, VGS = 0.8V. lselbox 1E-7 A/|jm). o.o 0.2 0.4 VGS(V) 0.6 0.8 Figure 11 ¡Transconductance variation of JLT, HJLT, and HSJLT with a change in the gate voltage. ^■-«»Mlll}^, .....X1' —*—JLT —■— HJLT —•— HSJLT 40 35 30 ^ 25 ~"5> 20 ro 15 10 5 0 -|-1—i ■ ■■■■■!-1—i ■ ■•■■•)-1—i i i vmj-1—i i i rmj-1—i nrmj-1—i i i rmj— 1E-11 1E-10 1E-9 1E-8 1E-7 1E-6 1E-5 1E-4 lDS [A/urn] Figure 12: TGF as a function lDS/(W/L) in JLT, HJLT, and HSJLT. \ Figure 13: Variation of fT as a function of TGF in JLT, HJLT, and HSJLT. Figure 13 shows the variation of fT as a function of gm/lDS. fT depends on the total gate capacitance and transconductance, as shown in Eq. (2). HSJLT exhibits higher fT than conventional JLT, but lower fT than HJLT at moderate or strong inversion (i.e., gm/lDS < 10) due to the large gate capacitance of theHSJLT, as shown in Figure 14, and dipping of the transconductance. In deep-strong inversion (i.e., 10< gm/lDS>20), fT of HSJLT is higher when compared to the other two devices because of higher g . gm 2kC gg gm I I DS DS 2kC (2) gg 0.10 O vGS 10 kHz) 0.002% = 2-10"5 Voltage gain 2 x 22.4 Amplified input noise 3.60 mV Idle output noise (input shorted) 0.49 mV Generated output noise (carrier) 0.15 mV Entire output noise 3.63 mV CNR 66.2 dB The presented analysis of the sources and propagation of noise reveals that the most important source of noise is the multiplier. The data in Table 4 shows that the noise generated by the power stage is negligible in relation to the amplified input noise. The input and output signals have almost the same CNR. The noise generated by each stage (except the power amplifier stage) is independent of the signal size unless the limits of a stage are exceeded. A general solution to the signal to noise ratio problem is to either decrease the noise or increase the signal amplitude. In this case, the most critical stage regarding generated noise is the AD633 multiplier. There is considerable headroom available with regard to signal size at this stage, while nothing can be done to reduce the noise generated by the AD633. Therefore, the solution would be to increase signal size before it is passed through the multiplier and reduced again just before the power amplifier stage. 5.2 Noise analysis of the improved system In order to increase the CNR at the output of the multiplier, the voltage gain of the second stage of the input amplifier was increased from 1 to 10 and the oscillator output was connected to the summing input of the AD633 directly, without any attenuation to maintain the same modulation depth of the AM signal. The amplitudes of all signals involved are still below the saturation margins of the device. The multiplier output had to be attenuated by approximately a factor of 10 before it could be fed into the power amplifier in order to maintain the same signal levels as before. To achieve the attenuation, the capacitances of both DC blocking networks at the power amplifier input were changed. Due to the sparse value scales of the multilayer ceramic capacitors the capacitive voltage divider attenuates the output voltage to 13% instead of 10% in the pass band between 1 kHz and 1 MHz. Had the multiplier been the only source of noise, this modification would have resulted in a 20 dB improvement of the CNR. Tables 5, 6 and 7 present the noise magnitudes for the input stage, the modulator and the power amplifier, respectively, of the improved system. The results show that the CNR at the output of the modulator is indeed improved by 18.5 dB, however the CNR at the output of the power amplifier is slightly less improved, namely, by only 15.9 dB, since the noise generated by the power amplifier is not negligible anymore. Table 5: Modified input amplifier noise voltages (B = 20 kHz, T = 300 K). Stage 1 2 R1 5.0 kO 1.0 kO R2 4.7 kO 10.0 kW Thermal input noise 0.9 mV 0.55 mV Amplifier input noise 4.4 mV 4.4 mV Equivalent input noise 4.5 mV 4.4 mV Inverting gain 0.94 10 Output noise 8.7 mV 48.4 mV Entire output noise 99.6 mV Table 6: Multiplier noise sources (B = 40 kHz). Multiplier output noise 32.9 mV 3.3 V carrier noise 96 mV AD633 output noise 160 mV Entire output noise 189 mV CNR 84.8 dB Table 7: Power amplifier noise voltages Vo = C = 9.7 VR] P, = 13.7 W. Amplified input noise 0.55 mV Idle output noise (input shorted) 0.49 mV Generated output noise (carrier) 0.19 mV Entire output noise 0.76 mV CNR 82.1 dB 6 Measurement results The design of the analyzed system was focused on the demodulated sound quality, directivity and range. Actual hearing tests revealed the need for a detailed analysis of noise sources. The main difficulty of noise measurements in this particular case was the presence of the large but inaudible carrier. Spectral analyzers have a limited dynamic range, which makes it impossible to measure very small signals when large spectral components are present. To get around this problem, we performed noise measurements with the oscillator disconnected from the rest of the system. 34 W. Tangsrirat; Informacije Midem, Vol. 49, No. 2(2019), 61 - 68 In order to eliminate the on-board oscillator as a possible cause of audible idle noise, the ultrasonic transmitter was tested by using a linear power amplifier and two test signals. One test signal was generated with a function generator and the other by the quadrature oscillator of the designed system. No audible noise was perceived in either case at normal carrier levels. Measurements were performed with an HP3589A spectrum analyzer. The results of the measurements and theoretical analysis are summarized in Fig. 10. Noise power was calculated from measured power spectrum densities over the frequency band from 20 kHz to 60 kHz. This band contains all frequencies that can modulate the amplitude of the ultrasonic carrier and demodulate into audible sound or noise. 7 Conclusions The designed modulator amplifier system for a PAA resulted in good audio reproduction but exhibited noticeable acoustic noise when idle. We performed a noise analysis of the complete signal path and identified the analogue multiplier as the most significant source of the noise. This noise source is virtually independent of the signal levels, therefore higher signal levels at the multiplier input improve the output signal to noise ratio. The improvement of the device has been achieved by increasing the audio signal amplitude by a factor of 10 before it is fed into the modulator and by reducing it by approximately the same amount on the other side of the modulator. This change was possible without a PCB redesign and could therefore be implemented on the existing production series. The change has resulted in a 16 dB improvement in the CNR, which is enough to reduce the idle noise to an acceptable level. 8 Acknowledgments The author would like to thank M. Ciglar of Ultrasonic d.o.o. for the financial support of the project, A. Levstek for many helpful discussions and S. Begus for the use of an anechoic chamber. Figure 10: Theoretical and measured Noise (lower is better) and Carrier to Noise ratio (higher is better) before and after the modification. The theoretical noise powers are lower than the measured ones in both the case of the original and the modified driver. This can be explained by the frequency response of the output filter shown in Fig. 8 which indicates that noise power density that appears on the transmitter terminals is amplified in certain frequency regions. The actual acoustic response is much more limited by the frequency response of the utilized PZT transducers. The analysis as well as the experimental results revealed the main source of noise and enabled us to minimize its effect on the output signal without modifying the printed circuit board (PCB). This made it possible for the modification to be implemented on the existing production series. The improved version has considerably less perceptible idle noise as well as a slightly larger maximum volume. 9 References 1. P. J. Westervelt, "Parametric Acoustic Array," J. Acoust. Soc. Am., vol. 35, no. 4, p. 535, 1963, https://doi.org/10.112171.1918525 2. I. Esipov, K. Naugolnykh, and V. Timoshenko, "The Parametric Array and Long-Range Ocean Research," Acoust. Today, vol. 6, no. 2, p. 20, 2010, https://doi.org/10.112171.3467644 3. S. Tang, G. Zhu, J. Yin, X. Zhang, and X. Han, "A modulation method of parametric array for underwater acoustic communication," Appl. Acoust., vol. 145, pp. 305-313, Feb. 2019, https://doi.org/10.1016/j.apacoust.2018.07.032 4. J. N. Tjo/tta and S. Tjo/tta, "Theoretical study of the penetration of highly directional acoustic beams into sediments," J. Acoust. Soc. Am., vol. 69, no. 4, pp. 998-1008, Apr. 1981, https://doi.org/10.1121/1385594 5. L. Kopp, D. Cano, E. Dubois, L. Wang, B. Smith, and R. F. W. Coates, "Potential performance of parametric communications," IEEE J. Ocean. Eng., vol. 25, no. 3, pp. 282-295, Jul. 2000, https://doi.org/10.1109/48.855259 6. H. O. Berktay, "Possible exploitation of non-linear acoustics in underwater transmitting applications," 34 W. Tangsrirat; Informacije Midem, Vol. 49, No. 2(2019), 61 - 68 J. Sound Vib., vol. 2, no. 4, pp. 435-461, Oct. 1965, https://doi.org/10.1016/0022-460X(65)90122-7 7. L. Bj0rn0, "Introduction to nonlinear acoustics," Phys. Procedia, vol. 3, no. 1, pp. 5-16, Jan. 2010, https://doi.org/10.1016/j.phpro.2010.01.003 8. M. Ciglar, "Acouspade," http://www.ultrasonic-audio.com/, [Accesed: 31. 03. 2019]. 9. "Audio Spotlight," https://holosonics.com/, [Accesed: 31. 03. 2019]. 10. R. Haberkern, "Soundlazer," http://www.soundlazer.com/, [Accesed: 31. 03. 2019]. 11. E. Hong, S. V. Krishnaswamy, C. B. Freidhoff, and S. Trolier-McKinstry, "Micromachined piezoelectric diaphragms actuated by ring shaped interdigi-tated transducer electrodes," Sensors Actuators A Phys., vol. 119, no. 2, pp. 521-527, Apr. 2005, https://doi.org/10.1016/j.sna.2004.10.019. 12. M. Pirc and A. Levstek, "Sources of Noise in Practical Implementations of Modulators / Amplifiers for Parametric Acoustic Arrays," in Conference 2014, proceedings / 50th International Conference on Microelectronics, Devices and Materials, October 8 - October 10, 2014, pp. 157-162. 13. W.-S. Gan, J. Yang, and T. Kamakura, "A review of parametric acoustic array in air," Appl. Acoust., vol. 73, no. 12, pp. 1211-1219, Dec. 2012, https://doi.org/10.1016/j.apacoust.2012.04.001 14. H. M. Merklinger, "Improved efficiency in the parametric transmitting array," J. Acoust. Soc. Am., vol. 58, no. 4, p. 784, 1975, https://doi.org/10.1121/1380750 15. M. Yoneyama, "The audio spotlight: An application of nonlinear interaction of sound waves to a new type of loudspeaker design," J. Acoust. Soc. Am., vol. 73, no. 5, p. 1532, 1983, https://doi.org/10.1121/1389414 16. J. J. (HSS) Croft and J. O. (HSS) Norris, "Theory, History, and the Advancement of Parametric Loudspeakers," 2003. 17. "Air Ultrasonic Ceramic Transducers 400ST/R160," http://www.prowave.com.tw/english/products/ ut/open-type/400s160.htm. 18. A. Levstek, "Amplitude Stabilization in Quadrature Oscillator for Low Harmonic Distortion," Inf. MIDEM, vol. 43, no. 3, pp. 185-192, 2013. Copyright © 2019 by the Authors. This is an open access article distributed under the Creative Commons Attribution (CC BY) License (https://creativecom-mons.org/licenses/by/4.0/), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Arrived: 31. 03. 2019 Accepted: 15. 04. 2019 34 Original scientific paper https://doi.org/10.331B0/InfMIDEM2019.106 Informacije Journal of Microelectronics, Electronic Components and Materials Vol. 49, No. 1(2019), 43 - 50 Optimization of shunt capacitive RF MEMS switch by using NSGA-II algorithm and uti-liti Alireza.Ardehshiri1, Gholamreza Karimi2, Ramin Dehdasht-Heydari1 1Islamic Azad University, Department of Electrical Engineering, Kermanshah Branch, Kermanshah, Iran 2Razi University, Faculty of Engineering, Department of Electrical Engineering, Kermanshah, Iran Abstract: The present paper aimed at designing, optimizing, and simulating the RF MEMS Switch which is stimulated electrostatically. The design of the switch is located on the CoplanarWaveguide (CPW) transmission line. The pull-in voltage of the switch was 2V and the axial residual stress of the proposed design was obtained at 23MPa. In order to design and optimize the geometric structure of the switch, the desired model was extracted based on the objective functions of the actuation voltage and the return loss up-state and also the isolation down-state using the mathematical programming. Moreover, the model was solved by the NSGA-II meta-heuristic algorithm in MATLAB software. In addition, the design requirements and the appropriate levels for designing the switch were obtained by presenting the Pareto front from the beam actuation voltage and also the return loss up-state and isolation down-state. Finally, the RF parameters of the switch were calculated as S11=-2.54dB and S21=-33.18dB at the working frequency of 40GHz by extracting the appropriate parameters of the switch design through simulating a switch designed by the COMSOL Multiphysics software 4.4a and the advanced design system (ADS). Keywords: RF switch MEMS; Genetic algorithm; uti-liti algorithm; Actuation voltage Optimizacija šarazitne kapacitivnosti RF MEMS stikala z uporabo algoritmov NSGA-II in uti-liti Izvleček: Članek predstavlja načrtovanje, optimizacijo in elektrostatično simulacijo RF MEMS stikala. Dizajn stikala je osnovan na CPW prenosni liniji. Za optimizacijo structure stikala so bile uporabljene objektivne funkcije aktuacije napetosti, povratnih izkub v vzbijenem stanju in izolativnosti v izklopljenem stanju. Model je bil rešen z NSGA-II metahevrističnem modelu v MATLABu. Izračunani RF parametri stikala pri delovni frekvenci 40 MHz znašajo S11=-2.54dB in S21=-33.18dB. Parametri so bili določeni s pomočjo COMSOL Mutiphysics programske opreme. Ključne besede: RF MEMS stikala; generični algoritem; uti-liti algoritem; aktuacijska napetost * Corresponding Author's e-mail: ghrkarimi@yahoo.com The Micro-Electromechanical System (MEMS) refers the diodes or FET switches[3]. However, the high actua- to a technological process used to create integrated tion voltage and the high switching time are among systems and components of the complex (or the com- the weaknesses of the MEMS switches. MEMS switches bination of the electrical and mechanical elements) are of different types, in which series of switches (ohm [1]. In this regard, the MEMS switches are significantly connection) and parallel switches (capacitance) have considered due to their efficiency in areas such as fuzzy various applications. In this sense, they can be used as array systems and switching filters for wireless commu- an ohm (serial switches) and also the capacitive switch nication.[2] MEMS switches have low power consump- (shunt switches) using electrostatic, electromagnetic tion, very high isolation, very low insertion loss (the RF ,piezoelectric or thermal designs[3]. The electrostatic MEMS switches have the insertion loss of about 0.1 to setup is usually used due to its power consumption 45 R. P. Nelapati et al; Informacije Midem, Vol. 49, No. 1(2019), 25 - 32 closed to zero, lower performance time, and smaller size [2]. MEMS switches can be used both on micro strip lines and CPW lines of the glass, silicon and GaAs substrates, which are capable of being operated in these configurations up to the frequency of 100 GHz. A dielectric layer has been used in contacting the switch with the transmission line to prevent corrosion and fatigue in metal-to-metal connection [2]. It is worth mentioning that important parameters should be considered in designing MEMS switches. These parameters include the electrostatic actuation voltage, isolation, transmission losses, and operating time[2]. Numerous studies have been conducted on the evaluation of the performance of MEMS switch and its important parameters. As a switch is presented in [4], the return loss of -5.6 dB and an isolation of -24.38dB are obtained from an output voltage of 3.04 V and at a frequency of 40 GHz, using the design of the experiment of. When a switch is presented in[5], the return loss of -3.1dB and an isolation of -15dB are obtained from an output voltage of 7V and at a frequency of 40GHz. When a switch is presented in[6], the return loss of -0.98 dB and an isolation of -17.9dB are obtained from an output voltage of 82V and at a frequency of 20 GHz. Besides, when a switch is presented in[7], the return loss of -0.68 dB and an isolation of -35.78dB are obtained from an output voltage of 23.6V and at a frequency of 40 GHz. Moreover, when a switch is presented in[8], the return loss of -0.8 dB and an isolation of -30dB are obtained from an output voltage of 25V and at a frequency of 40 GHz. Finally, when a switch is presented in [9], from an output voltage of 3V and at a frequency of 40 GHz, using the design of the experiment of. In the present paper, a suitable model was extracted for optimizing the multi-object in the target functions (voltage actuation and RF parameter) of the switch using the mathematical programming method. Then, the proposed model was solved using the NSGA-II1 meta-heuristic algorithm. In addition, the proposed model was used to achieve a MEMS switch with low electrostatic actuation voltage and improved insertion loss and isolation by choosing the proper structures of width, length, and thickness and, also, using the Pareto front presented for the designed beam spring constant. The present paper is organized as follows: Section 2 evaluates the switch performance. Section 3 examines the details of the model and presents the Pareto front solution set for the actuation voltage and return loss up-state and isolation down-state by solving the proposed model using the NSGA-II in MATLAB software and the uti-liti algorithm. Finally, section 4 simulates the desired switch using the COMSOL and ADS software and evaluates the necessary parameters such as actuation voltage, operating time, insertion loss and the isolation. 2 MEMS switches performance 2.1 Initial performance Fig.1 illustrates a parallel MEMS switch. Which is located on the coplanar waveguide and includes two electrodes. The lower electrode is the central transmission line of the waveguide, while the upper electrode is a thin metal sheet, which is suspended on the lower electrode and connected to the lateral conductors of the coplanar waveguide. Further, the thin dielectric layer is covered on the lower electrode to prevent the metal-to-metal connection [10]. In the state up with the bridge in up position, the switch is OFF and shows insertion loss. ON state can be achieved by pulling down the beam in the down position through electro-static actuation. The isolation state is occurred especially when the bridge provides the ground for the float central capacitive area. The electrostatic actuation voltage of the capacitance switches is calculated according to the equation 1:[2] Figure 1: The schematic of the switch V = V ^ 8k 27£0 A ' (1) 1 Non-dominated Sorting Genetic Algorithm-II Where e0 represents the vacuum permittivity coefficient and indicates the air gap between the suspended bridge and the transmission line, the electrostatic actuation voltage is zero, and shows the beam spring constant. As shown in the equation, the distance (g0 = ggap + thd) and the area of the switch (A) can be reduced in order to achieve a low spring constant. The S-param-eters are first measured in the up-state position data (S11) which is fitted to get the up-state capacitance of the switch. S11 is achieved using the equation 2. The S-parameters are first measured in the down-state position data (S21) which is fitted to get the up-state capaci- 28 A. M. Garipcan et all; Informacije Midem, Vol. 49, No. 2(2019), 79 - 90 tance of the switch. S21 is achieved using the equations 3 .[11]magnetostatic, piezoelectric, or thermal designs. To\\ndate, only electrostatic-type switches have been demonstrated at 0.1-100\\nGHz with high reliability (100 million to 10 billion cycles S,) (up state) - jCQCuZ° 2 + jö)cuz0 , 2| Q)2Z02 (80Ww)2 (2) Jn AN2 V£r J) S21 (down state) - 2 + jö)cdz0 S 2 ~ P21 _ 4t„ (3) ö)2Z02(s0srWw) Where Z0 implies the impedance of the transmission line which is equal to 50 Ohms, u is the angular frequency and the Cu and Cd of the capacitor are in upstate and down-state and the C and C^re achieved u a using the equations 4.1 and 4.2: _ £0£rWw d ~ I (4.1) C.. £0Ww g + O gap y£rj (4.2) 3 RF MEMS switch design 3.1 Principles for mathematical programming Mathematical programming is based on the problem modelling. In other words, the programming tech- niques are used to achieve the maximum efficiency and the right decision-making process in terms of optimization and efficiency. Generally, the research techniques in operation are categorized in accordance to observation, definition, modelling, model solving, and model implementing, which should be considered in order to obtain the results of the research. [12] in a mathematical programming technique, four main and important parts should be followed in order to create a proper model of the problem. The objective function, constraints, decision variables, and parameters are the principles for designing a model using the mathematical programming. The solution set of the objective function is called the Pareto front, which is an optimal vector dominating other vectors especially when no similar vectors can be found in the entire solution space.[12] In this sense, the vector is generally called the non-dominated answer, and the set of these points is called the Pareto Front[13]. In order to optimize RF switch MEMS, A multi-objective integer programming model is proposed. The proposed model includes three objective functions: minimizing the actuation voltage and minimizing the return loss up-state and maximizing isolation down-state. Descriptions of objective function, constraints, decision variables, and parameters of the mathematical model are presented in Table 1. 3.2 Objective functions The objective functions are to minimize the actuation voltage, maximize the isolation and minimize the return loss as defined below: - Minimizing the actuation voltage. The objective function for actuation voltage is based on the equation (1). - Minimizing the return loss up-state for the best isolation. The objective function for return loss is based on the equation. (2). - Maximizing the isolation down-state. The objective function for isolation is based on the equation (3). The model presented in this paper is shown in equation 5. Table 1: List of parameters , and decision variables Parameters AL Young's modulus (E) AL Poisson's ratio (v) Switch thickness Frequency of Switch Width(w) (t) operation (f) 70GPa 0.32 0.877^m 40GHz 80^m Decision variables Spring constant Switch Length Dielectric layer thickness Air gap (k) (W) (td) (ggap) 45 A. M. Garipcan et all; Informacije Midem, Vol. 49, No. 2(2019), 79 - 90 I Actuationvoltage : min : ZI = V- -g03 ^ 21eüWw , ,2 Û^Z,,2 (ÉJFv Returnlossup-state: Min: Z2 = \S„\ =--- ' A' (5) J? +(— Oil® V _ I |2 At Isolation down - state : Max :Z3 = \S21\ ---— o}2Z02{e0£rn subject.to : 150/m< k < 1.40V / m 150/.