APA:
Raman, Srilata, Patnaik, Lalit Mohar, Šilc, Jurij, Špegel, Marjan (1991). Parallel implementation of VLSI hed circuit simulation.
Informatica (Ljubljana), volume 15, issue 2, 15, št. 2 (1991), str. 14-22.
URN:NBN:SI:DOC-16G9JZXB from http://www.dlib.si
MLA:
Raman, Srilata, Patnaik, Lalit Mohar, Šilc, Jurij, Špegel, Marjan. "Parallel implementation of VLSI hed circuit simulation."
Informatica (Ljubljana) volume 15. issue 2 (1991) 15, št. 2 (1991), str. 14-22.
<http://www.dlib.si/?URN=URN:NBN:SI:DOC-16G9JZXB>