Elektrotehniški vestnik 84(1-2): 17-23, 2017 ORIGINAL SCIENTIFIC PAPER On the Design of Linearly Tunable Wide Input Voltage Range CMOS OTA and Its Application Danupat Duangmalai, Khanittha Kaewdang Department of Electrical and Electronic Engineering, Faculty of Engineering, Ubon Ratchathani University, Ubon Ratchathani, 34190 E-mail: kongnkp@hotmail.com, khanittha.k@ubu.ac.th Abstract. In this paper, a CMOS OTA with a wide input voltage range and linearly tunable transconductance gain (gm) is presented. To achieve the linear control of transconductance, the bias current (Ib) is squared by using the current squarer circuit before applying it into the main CMOS OTA. In addition, the source degeneration technique is used to extend the input voltage range. The frequency response of the proposed OTA is analyzed and studied. The performances of the proposed CMOS OTA are tested on PSPICE simulation on TSMC 0.35 ^m CMOS technology with a power supply of ±1.5V. The transconductance of OTA can be linearly tuned by adjusting Ib in the range from 1nA to 1.1mA. The proposed OTA also operates well in a wide input voltage range from -1 to 1 volt with a good linearity, and a bandwidth of approximately 8.35 GHz can be achieved. Moreover, a linearly controlled quadrature oscillator based on the proposed CMOS OTA is present to demonstrated the linearly tunable transconductance gain. Keywords: CMOS OTA, transconductor, linearly tunable, wide input range, quadrature oscillator Zasnova in uporaba transkonduktančnega operacijskega ojačevalnika s širokim vhodnim napetostnim območjem in linearno nastavljivim ojačenjem V prispevku je predstavljen operacijski transkonduktančni ojačevalnik OTA v tehnologiji CMOS s širokim vhodnim napetostnim območjem in linearno nastavljivim ojačenjem. Za dosego linearnosti je mirovni tok kvadriran z uporabo tokovnega kvadraturnega vezja pred uporabo v vezju OTA. Zmogljivost vezja, zasnovanega v tehnologiji CMOS TSMC 0.35 ^m in napajalno napetostjo ±1.5 V, smo preverili s simulacijami v okolju PSPICE. Analizirali smo tudi frekvenčni odziv vezja. Transkonduktanco vezja OTA linearno nastavljamo s tokom IB v območju od 1 nA do 1.1 mA. Predlagano vezje OTA deluje v območju vhodne napetosti ±1 V z dobro stopnjo linearnosti in pasovno širino 8.35 GHz. Za prikaz in uporabo linearno nastavljive transkonduktance vezja OTA je opisan je tudi kvadraturni oscilator. 1 Introduction The operational transconductance amplifier (OTA) is an active building block which functions as a voltage-to-current converter device. It is a fundamental building block of analog circuits especially in signal processing systems and vary useful in many applications such as automatic gain control systems [1], analog multipliers [2], sinusoidal oscillators [3-4], active filters [5] and square-rooters [6]. In many applications, a linearly tunable transconductance controlled by the current or voltage is preferred and most of these designs are constructed from bi-polar transistors which are more complicated and expensive to fabricate than the CMOS trasconductor [7]. However, operation of the CMOS transistors can be expressed as an approximation of a squarer function rather than a linear function. Another disadvantage of the CMOS transconductors [8-9] is their linearly controllable voltage range which is quite limited and not suitable for the low-voltage circuitry due to their weak inversion operating mode. Due to the advantage of the CMOS technology over the bi-polar technology, many linear CMOS transconductors have been presented [10-12]. Since their transconductance gains are controlled by the DC voltage, the controllable range is limited by the supplied voltage. Therefore, the tunable range is narrow. In a recent approach, current control transconductors have been proposed [13-18], where their gm can be linearly tuned in a wide range. However, their structures are quite complicated. Therefore, a new technique to design a wide input voltage range CMOS OTA with a linearly tunable transconductance gain via a DC bias current is presented in this paper. The proposed CMOS OTA is constructed from two parts. The first part is a balanced differential pair with an improved input range by using active resistances at the source of the balanced differential pair in order to reduce the source degeneration, and the second part is a current squarer circuit for the linearly tunable characteristic. The DC bias current of the Received 6 December 2016 Accepted 17March 2017 18 DUANGMALAI, KAEWDANG current squarer circuit of the proposed CMOS OTA is not a square-root function so we can linearly tune the transconductance of the proposed circuit. Note that introduction of this technique was presented in our previous work [19]. However, in this paper an extended circuit analysis, frequency-response analysis and circuit performance are presented. In addition, a new linearly tunable quadrature oscillator is proposed to confirm the usefulness of the proposed CMOS OTA. This proposed circuit is verified through the PSPICE simulation based on parameters of the TSMC 0.35^m and an application example of CMOS OTA as a tunable sinusoidal quadrature oscillator is examined and discussed. The wide input range CMOS OTA consists of the current mirrors (M13-M14, Mu-Mm and M17-M1S), differential pair (Mu and M12) that is perfectly matched with the source degeneration constructed by the active resistors (M9 and M10) where Isq is to bias the balanced differential pair. The input voltage of the circuit is determined as ^ = V+-V_ (3) From the circuit analysis in Fig. 1, input voltage ¥„ in (3) becomes V - V + V -V -V ' in V GS12 + V GS10 VGS11 VGS (4) 2 Principle of operation 2.1. The proposed linearly tunable wide input voltage range CMOS OTA _Current squarer_ d Thebalanced differential pair circuit ^ fM1 Mq 12 Isq= 2Ia + ^ - h (1) 12 Isq= ^Tfor - 4/a (2) where IA is the bias current of the squarer circuit, and Ib is the DC input current of the squarer circuit. Since ID11 = ID9 - 1 LinCx (W/L) (Vgsu + K,) and ID12 ID10 2 1 (WL) (VGS12 +V, )2. Therefore, V V V and V are V GS9, V GS10 , V GS11 and V GS12 are V =\_^_+ V V =\_2ID1_+ V \VnCoxWL 'GS'' + V-a"d ' 2I ■ GS12 - d D1/t + Kh12 , respectively. VnCoxWL V - Figure 1. Proposed linearly tunable wide input range CMOS OTA To obtain a linearly tunable transconductance and a wider input voltage range as compared to the existing CMOS OTA, the proposed CMOS OTA is constructed from two main parts. The first part is a current squarer circuit for the linearly tunable characteristic and the second part is a balanced differential pair with an improved input range by using active resistances at the source of the balanced differential pair in order to reduce the source degeneration. The schematic of the proposed CMOS OTA is shown in Fig. 1. The squarer circuit consists of transistor M1-M8, where M6, M7 and M8 act as current mirrors that provide a bias current for M3, M4 and M5 also M1 and M2 act as a current mirror as well. From a routine circuit analysis, the output current of the squaring circuit (Isq) can be expressed as \MnCoxWL By substitutmg Vgs9, Vgs10 , Vgs11 and Vgs12 into Eq. (4), vin can be rewritten as K. - VnCox I W ( 2^ - 24TZ) (5) By applying KCL to the output node, output current Io can be defined as Iout ID16 ID18 (6) and at node I Isq - ID11 +ID12 (7) From Eq. (6), if ID16 - ID12and ID18 - ID11, the drain current will be ID12 - Iout + ID11, by substituting these to Eq. (7), it yields Jsq - 2Idh + Iou,. So currents ID11 and I D12 can be expressed as If W/L of transistor Ms is set as (W/L)ms = 2(W/L)m6M7, then the output current of the squarer circuit in (1) will be rewritten to ID11 I sq ^ out and j _ ^sq + ^out rm (8) (9) 1 1 SS 2 2 ON THE DESIGN OF LINEARLY TUNABLE WIDE INPUT VOLTAGE RANGE CMOS OTA AND ITS APPLICATION 19 By substituting (8) and (9) into (5), it yields V = 1 u C W/L ' n ox / /■j l^sq ^ 1out /-j lIsg 1out Í~~2 — (10) The total capacitance of differential pair Cdijf can be expressed as Cdf = Cdjj 1 + Cdf 2 (I9) where Cdf and Cdjp are defined as From (10), the output current is obtained as V. 1out ■^MnCox {W/L)Ig (11) C = C + C Cdiff 1 Cgs12 + Cgs10 C = C + C Cdiff 2 Cgs11 + Cgs9 (20) (21) The transconductance gain (gm) of the balanced wide input range CMOS OTA can be expressed as gm =\4^Cx WIL)Iq (12) By substituting Isq in (2) into (12), the transconductance gain can be rewritten as g m B UnCox (W/L) 2 V 8I, (13) IR Jm2±H|_/+ I M,, c... , M,, 1 11 Ct q M difff 2 cdif1 M Î^ïjM, p 0 v. R, If K=UnCox(W/L), the transconductance gain will become gm r\ 2 V81 (14) From (14), if Ia is fixed, the transconductance gain can be linearly controlled by external DC current Ib. Moreover, it should be noted that the transconductance gain of this proposed CMOS OTA will provide a low-harmonic distortion if the input voltage is limited in the following range -iB4m~A ^ Vn ^ Ib4KÜ~a (15) where Cmi and Cm2 are defined as + C. C = C gs16 (17) Figure 2. Frequency-response analysis of the circuit in Fig. 1. As indicated in Fig. 2, transistor M12 conducts a drain current signal of gm (Vin / 2), which flows through diode-connected transistor M15, and thus through a parallel combination of 1/ gm15and Cm2 where we neglect resistances ro12and ro15 which are larger than 1 / gm15, voltage V j can be expressed as Vg1= ■ gm12 ' gm10 gm10 + gm12 + s (Cgs10 + Cgf 12 ) gm 15 + sCm V •• (22) 2 2.2. Frequency response analysis of the proposed CMOS OTA Consider the frequency response of the current-mirror-load-balanced differential pair CMOS OTA. The balanced differential pair CMOS OTA is shown in Fig. 2 with four capacitances, Cm is the total capacitance of the current mirror (M13-M14 and M15-M16) at the input node. Cf is the total capacitance of the differential pair and Rl is the total resistor at the output node. The total capacitance of current-mirror Cm can be expressed as Cm=Cm1 +Cm2 (16) The drain current of M16 can be defined as idl6 = ~gm16Vg1 (23) By substituting V x in (22) into (23), drain current id16 can be rewritten as gm10 + g m 1 2 + s ( Cgs10 + Cgf 12 ) d16 sC 1 + SCL gm15 and voltage V 2 can be written as -JnL (24) Vg 2=" gm13 ' gm9 gm9 + gm11 + s (Cgs9 + Cgs11 ) gm 13 + sCm Ins. 2 (25) C =C + C ml gs13 gs14 (18) 2 R o out 20 DUANGMALAI, KAEWDANG Since drain current id14 = id17 = id18, idi8 is defined as id18 = ~gm18Vg 2 (26) By substituting Vg2 in (25) into (26), drain current id18 can be expressed as gm1 gm9 + g m 1 1 + s ( Cgs 9 + Cgs11 ) sC 1 + sCm2 -Jn (27) gm13 Now, at the output node, the total current is lout 1dl6 + ldl8 (28) which flows though a parallel combination of Ro = ro16//ro18 and Rl , thus V = L 1 (29) R„ + Rr By substituting iout in (28) into (29), where gm9 = gm10 = gmR , gm13 = gm15 = gmcm and Sm 11 = Sm 12 = g . The voltage transfer gain is written as gmD 'md,ff 1 + - sC diff 1+ g mi J_ R„ + Rr ( 3 0 ) r _ gmcm p = sC (31) and a zero with frequency f g„ fz = sC (32) diff Eq. (32) indicates that capacitance Cdtff at the differential pair gives rise to a zero with frequency fz. 2.3 Application example: A linearly tunable sinusoidal quadrature oscillator The quadrature oscillator is a typical sinusoidal oscillator which provides two sinusoidal outputs with a 90 degree phase shift. It is found useful in measurement systems, simple sideband generators, quadrature mixers, vector generators and selective voltmeters [20-22]. In order to demonstrate the advantage of the proposed tunable CMOS OTA, a quadrature oscillator based on the proposed CMOS OTA oscillation frequency which can be linearly controlled is presented. Fig. 3 shows a block diagram of the quadrature oscillator which is composed of an integrator circuit, amplifier circuit and adder/subtractor circuit. Adder/subtractor circuit 1 Vo1 -1 sa sb Integrator circuit Integrator circuit Amplifier circuit Figure 3. Block diagram of the quadrature oscillator Eq. (30) indicates that capacitance Cm at the input of the current mirror gives rise to a pole with frequency f p Figure 4. Schematic diagram of the quadrature oscillator Based on the block diagram in Fig. 3, the oscillator consists of three CMOS OTAs, two grounded capacitors, one adder/subtractor circuit and one resistor. A schematic diagram of the circuit is shown in Fig. 4, where OTAa and Ci function as integrator a, OTAb and C2 function as integrator b and OTAc is the amplifier circuit. The characteristic equation of the circuit can be obtained as sCC2 + sC2gma (1 - gm R ) + gm^ = 0 (33) From (33), the condition of oscillation and frequency of oscillation are written as Rgm, > 1 and CC (34) (35) + k 1 v o v ON THE DESIGN OF LINEARLY TUNABLE WIDE INPUT VOLTAGE RANGE CMOS OTA AND ITS APPLICATION 21 From (34) and (35), if gm 2 h and S m 2 y 8i, 'ft yields S = — Table 1. Dimensions of the CMOS transistors. MOS transistors Wfam) / L(^m) M1-M7, M11-M18 1.75/0.35 M8 3.5/0.35 M9, M10 0.35/0.35 RIr, > 1 (36) and IBaIBbk 32ICC (37) If Ib =Ib, Eq. (37) can be reduced to = I 32IaCxC, (38) From (38), the frequency of oscillation can be linearly tuned with IB while the condition of oscillation can be adjusted by IBc. From (36) and (38), it is obvious that the condition of oscillation and frequency of oscillation can be adjusted independently. The relationship between output voltages V and V can be expressed in the voltage transfer function as K, ( S) - Sm Vi( s) sCn (39) The voltage of the sinusoidal steady-state can be rewritten as K O) , Vo, Ü®) mC2 (40) It is found from (40) that the quadrature output voltage, (V and V ), has the phase difference at 90o. Fig. 5 shows the simulation result of the output current (lout) versus the input voltage (Vn) when the bias current (Ib) was set at 500^A, 700^A and 800^A, respectively. It clearly shows that in case of Ib at 500^A, 700^A and 800^A, the input voltage is linearly converted to be the output current with a nonlinearity of less than 2.5% for the input voltage(Vn) in the range from -0.8 to 0.8V, from -0.97 to 0.97V and from -1.01 to 1.01V, respectively. These results were agreed with (15). gm, when the DC bias current Ia=200^A and the DC bias current Ib=500^A, was 0.38mA/V. The plot of the relationship between gm and the input voltage in the range from -1.1 to 1.1V is shown in Fig. 6. It shows that, in the case of Ib = 500^A,700^A and 800^A, the circuit can linearly convert the input voltage into the output current for V„ in the range from -0.7 to 0.7V, from -0.8 to 0.8V and from -0.6 to 0.6V, respectively, with the transconductance nonlinearity of less than 3%. -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 Vin (V) Figure 5. DC transfer characteristic of the proposed CMOS OTA \ -v- It = 800 uA -B It = 700 uA -0 Ib = 500 uA q\. jd- X -1.1 -1. -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 -1.1 Vin (V) Figure 6. Transconductances versus the input voltage I I k k k k 3 Simulation Results PSPICE was used to verily the performances of the proposed CMOS OTA. The technology used in the simulation was the TSMC 0.35^m n-well CMOS process. The parameters of the MOS transistors were in level 3. The dimensions of the MOS transistors are illustrated in Table 1. The power supply voltages were set at Vdd = -Vss = 1.5 V and bias current Ia was set at 200^A. Figure 7. Linear transconductance tunable range 22 DUANGMALAI, KAEWDANG iHz \ V. 1.0K 10K 100K 1.0M 10M 100M 1.0G 10G 100G 1.0T Frequency (Hz) Figure 8. Frequency response of CMOS OTA 2 -5m 0 Vin (V) 5m Parameters Values Power supply voltage ±1.5V Power consumption 3.05mW 3dB bandwidth 8.35GHz Input voltage range -1.01V to 1.01V Bias current (Ib) range for 1nA to 1.1mA linear gm Offset voltage 0.24mV Gain margin -95.22dB Phase margin 90.09° The performances of the proposed linearly tunable quadrature oscillator in Fig. 4 were verified through a PSPICE simulation. For the design on PSPICE, the frequency of oscillation (fOSc) was 600kHz. The bias currents of OTAa and OTAb were set at 500 /A ( IB = IB = IB = 500/A ) and the bias current of OTAc was set at 697/A ( IB = 697/A ) and C = C2 = 50pF. Figure 9. Simulation result of the input offset voltage of the proposed CMOS OTA Fig. 7 shows the plot of the relationship between transconductance gain gm and DC bias current Ib. It was measured by setting Ia=200^A and varying Ib from 1nA to 1.2mA. This result shows that gm can be linearly tuned by bias current Ib over the current range from 1nA to 1.1mA, where the simulated conversion error is less than 4.3%. The frequency response of the proposed circuit is shown in Fig. 8, in the case of the DC bias current Ib=500^A, transconductance gain gm=3.8x10"4V/A, g =1.7x10"4V/A, g =3.8x10-4V/A, Cm =1.81*10F and =3.8x10-15F, a -3dB bandwidth of approximately 8.35 GHz is achieved. From this result it is found that the frequency response of the proposed CMOS OTA is according to calculation (22) with an error of about 5%. Fig. 9 shows the input offset voltage of a linear wide input range CMOS OTA by setting the bias currents IB = 700^A, and input voltage Vin is varied from -5mVto 5mV, the input offset voltage is |Vos | = 0.24m V where RL=1kQ and the output voltage (vOMi) is measured from the voltage dropped on Rl. The characteristic of the linear wide input range CMOS OTA is shown in Table 2. Table 2. Performance data of CMOS OTA. 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35 1.40 1.45 1.50 Time (ms) Figure 10. Output waveform at the initial state 1.262 1.264 1.266 1.268 1.270 1.272 Time (ms) 1.274 1.276 1.278 Figure 11. Output waveform at a steady-state 100 > E S10 > o > 0.1 1 f 30 kHz J □ Vo2 = 0.39% A U — ^ 0 0.5 1 1.5 2 2.5 3 3.5 4 Frequency (MHz) Figure 12. Output waveform at a steady-state ••■Simulated, C = 50pF ••■Simulated, C = 500pF ••■Simulated, C = 5nF -Theoretical, C = 50pF -Theoretical, C = 500pF -Theoretical, C = 5nF 300 350 400 450 500 550 600 650 700 750 800 850 900 Figure 13. Output frequency versus the Ib current -12 1.0 10 100 0 -1 10 10 10 ON THE DESIGN OF LINEARLY TUNABLE WIDE INPUT VOLTAGE RANGE CMOS OTA AND ITS APPLICATION 23 From the condition of (36), the resistor (R) will be equal to 5.2kQ. Figs. 10 and 11 show the output waveform at the initial state and the output waveform at a steady-state of Voi and Vo2, respectively. Fig. 12 shows the output spectrum of the quadrature oscillator where the simulated oscillation frequency was obtained at 600 kHz, and the total harmonic distortion (THD) was approximately 0.39 %. Fig. 13 shows the plots of the simulated and theoretical oscillation frequencies versus bias currents Ib where Ci and C2 with identical values are 5nF, 500pF and 50pF. It is seen that the simulation results are in accordance with the theoretical analysis shown in (38). 4 Conclusion In this paper, a new design of the linearly tunable transconductance gain and wide input voltage range CMOS OTA is presented. In order to obtain a linear gain adjustment and a wider input voltage range, the proposed CMOS OTA is constructed with an improved balanced differential pair and the current squarer circuit. This enables the proposed OTA to achieve a linear controllability of the tranconductance gain with a nonlinear transconductance of less than 4.3%. Moreover, a wider input voltage range from -1.1V to 1.1V is obtained. The PSPICE simulation with the TSMC 0.35 ^m CMOS technology can demonstrate the performance of the proposed CMOS OTA. The operating frequency response of the proposed CMOSOTA can be up to appoximately 8.35GHz with the power consumptions of 3.05mW. In addition, the simulation results of the proposed quadrature oscillator were obtained to verify the theoretical analysis. Acknowledgement This work was funded by the Thailand Research Fund (TRF), under the Research Grant for TRF Research Scholar Program (Grant No. RSA5680040). References [1] Lin Y.T., Chen C.H., Lu S.S. "A feed-forward automatic-gain control amplifier for biomedical applications" Asia-Pacific Microwave Conference Proceedings. Bangkok. Thailand. (2007). [2] Riewruja V., Rerkratn A "Four-quadrant analogue multiplier using operational amplifier" International Journal of Electronics. 98(4), 459-474, 2011. [3] Souliotis G., Psychalinos C. "Harmonic oscillators realized using current amplifiers and grounded capacitors" International Journal of Circuit Theory and Applications, 35(2), 93-104, 2007. [4] Senani R, Singh V.K "Novel single-resistance controlled oscillator configuration using current feedback amplifiers" IEEE Trans Circuits, 43(8), 698-700, 1996. [5] Souliotis G.A. "current mode automatic frequency tuning system for filters with current mirrors" Int. J. Cire Theor, 38(6), 591-606, 2010. [6] Psychalinos C. "Square-root domain wave filters. International Journal of Circuit Theory and Applications", 35, 131-148, 2007. [7] Wittlinger H.A. "Application of the CA3080 and CA3080A High Performance Operational Transconductance Amplifiers" RCA Application Note ICAN-6668. Data book, 247-248, 1972. [8] Wang Z. "Guggenbuhl, W. A Voltage-Controllable Linear MOS Transconductor Using Bias Offset Technique" IEEE J. SolidState Circuits, 25, 315-317, 1990. [9] Wang Z. "Novel linearisation technique for implementing large-signal MOS tunable transconductor" Electronics Letters, 26, 138— 139, 1990. [10] Huang S.C., Ismail M.A. "Voltage-Controllable Linear MOS Transconductance Using Bias Offset Technique" IEEE J. SolidState Circuits, 25, 315-317, 1993. [11] Wilson G., Chan P.K. "Saturation-Mode CMOS Transconductor with Enhanced Tunability and Low distortion" Electronics Letters, 29, 459-461, 1993. [12] Jiunn Y.L., Chien C.T. Wei H.C. "A 3 V linear input range tunable CMOS transconductor and its application to 3.3 V 1.1 MHz Chebyshew low-pass Gm-C filter for ADSL" IEEE 2000 Custom Integrated Circuits Conference, 387-390, 2000. [13] Torralba A., Martinez-Heredia J.M., Carvajal R.G., Ramirez-Angulo J. "Low-voltage transconductor with high linearity and large bandwidth. Electronics Letters", 38, 1616-1617, 2002. [14] Galán J.A., Carvajal R.G., Muñoz F. "Torralba, A.; Ramírez-Angulo J. Low-Power Low-Voltage Class-AB Linear OTA for HF Filters with a Large Tuning Range" Analog Integrated Circuits and Signal Processing, 37, 275-280, 2003. [15] Calvo B., Celma S., Sanz M.T., Alegre J.P., Aznar F. "Low-Voltage Linearly Tunable CMOS Transconductor With Common-Mode Feed forward" IEEE Transactions on Circuits and Systems I, 55, 715-721, 2008. [16] Wang Z. "Novel linearization technique for implementing large-signal MOS tunable transconductor" Electronics Letters, 26, 138-139, 1990. [17] Kaewdang K., Surakampontorn W. "On the realization of electronically current-tunable CMOS OTA" Int. J. Electron. Commun (AEU), 61, 300-306, 2007. [18] Kaewdang K., Surakampontorn W. "A balanced output CMOS OTA with wide linear current tunable range" Int. J. Electron. Commun (AEU), 65, 728-733, 2011. [19] Duangmalai D., Kaewdang K. "A linear tunable wide input range CMOS OTA" TENCON 2014-2014 IEEE Region 10 Conference, 2014. [20] Bolton W. "Measurement and Instrumentation Systems. Newnes Oxford" UK, 1996. [21] Gibson J.D. "The Communications Handbook. CRC Press. Boca Raton" Fla. USA, 1997. [22] Seunghyeon N., Kyungtac H., Wonyong S. "A cordic-based digital quadrature mixer" IEEE, 1998. Danupat Duangmalai is Ph.D. student in Electrical Engineering at the Ubon Ratchathani University, Thailand. He received BSc in 1996 from the Pathumwan Institute of Technology, Bangkok, Thailand, and MSc in Industrial Education in Electrical Engineering from the King Mongkut's University of Technology North, Bangkok, Thailand, in 2007. His research interests include analog integrated circuit. Khanittha Kaewdang is an Assistant Professor at the Department of Electrical and Electronic Engineering, Ubon Ratchathani University in Ubon Ratchathani, Thailand. She received B.Eng. in 1999 from Ubon Ratchathani University, M.Eng. in 2002 and D.Eng. in 2006 from the King Mongkut's Institute of Technology Ladkrabang (KMITL), Bangkok, Thailand. Her research interests include analog signal processing, analog integrated circuit, CMOS IC design for low power systems, biomedical electronics and electronic instrumentation.