EXPERIMENTAL DETERMINATION OF THE MOSFET TURN-OFF SNUBBER CAPACITOR
Oto Težak, Drago Dolinar, Miro Milanovič
Univerza v Mariboru, Fakulteta za elektroteliniko, računalništvo in informatiko,
Maribor, Slovenija
Key words: turn-off snubber, dc-dc converter, power dissipation, approximation functions, differential evolution method, experiment.
Abstract: Tfiis paper presents tine analysis and design procedures of snubber circuits for low power dc-dc converters, realised using MOS-FETs. The appropriate design of the snubber circuit can considerably increase the power range, or decrease the total power dissipation of the low-power dc-dc converters available as an integrated circuit. The evaluation of a snubber circuit is based on analysis of the measured currents and voltages, approximated by the continuous functions. The differential evolution method is used to determine the approximation functions unknown coefficients. The results of this proposed method enable the reduction of power dissipation on the transistor while the converter's efficiency remains unchanged. The benefits, drawbacks and limits of the proposed approach are analysed in details. Experimental results are also given, obtained by a laboratory prototype of the boost converter.
Eksperimentalno načrtovanje kondenzatorja v izklopnem razbremenilnem vezju MOSFET-a
Kjučne besede: izklopno razbremenilno vezje, dc-dc pretvornik, preklopne izgube, aproksimacijska funkcija, diferenčna evolucija, eksperiment.
Izvleček: V članku smo predstavili analizo in postopek načrtovanja izklopnega razbremenilnega vezja za dc-dc pretvornike nizkih moči, ki so realizirani z MOS-FET-i. Ustrezno načrtovano razbremenilno vezje lahko pomembno poveča moč ali zmanjša stikalne izgube dc-dc pretvornika nizke moči, ki je na voljo v obliki integriranega vezja. Analiza razbremenilnega vezja temelji na analizi izmerjenih tokov in napetosti, ki smo jih aproksimirali z zveznimi funkcijami. Za določitev neznanih koeficientov izbranih aproksimacijskih funkcij smo uporabili metodo diferenčne evolucije. Iz izraženih analitičnih funkcij smo izračunali potek izklopne energije. Celotna izklopna energija, ki se pretaka med tranzistorjem in razbremenilnim vezjem, je enaka vsoti energije, ki jo absorbira tranzistor in energije, ki jo shrani kondenzator. Potek celotne izklopne energije ima minimum pri izbrani vrednosti kondenzatorja razbremenilnega vezja. Rezultati predlagane metode omogočajo zmanjšanje preklopnih izgub na tranzistorju pri nespremenjenem izkoristku pretvornika. Podrobno smo analizirali prednosti, slabosti in omejitve predlaganega pristopa. Podani so rezultati eksperimenta, ki smo ga izvedli na laboratorijskem prototipu dc-dc pretvornika navzgor.
1. Introduction
Dc-dc converters appear in large numbers of electrical equipment. Most of tfiem are operated in hard switching mode, therefore, they suffer from switching losses. The hard switching operation and reduction of switching losses is discussed in many books and papers relating to these topics (McMurray 1980, Williams 1987, Rashid 1993). Recently basic converter structures such as buck converters, boost converters and buck-boost converters could be realised as chip versions. The switch power losses must be properly evaluated in such cases in order to use the internal chip transistor more efficiently. The snubber circuits are usually placed in the converter structure to adjust the switching-on and switching-off losses. The switching-on snubber circuit is connected in series to limit the di/dt at turn-on. The switohing-off snubber circuit limits du/dt at turn-off.
The approach for evaluation of the switching-off dissipation suggested by (Williams 1987) and (Mohan etal. 1989) is efficiently used in the analysis of BJT-s where current and voltage could be replaced by linear functions. It is, however, less appropriate in the case of MOS-FET, where
current and voltage time shapes can not be treated by linear functions.
This paper suggest a modified design approach for a boost converter MOS-FET turn-off snubber circuit based on systematic experimental analysis of losses. The converter's currents and voltages during the switch-off interval are measured for different values of snubber capacitance, and they are approximated by analytical functions to calculate the switching losses. The differential evolution method (Price 1996) is used to determine the approximation functions unknown parameters for currents and voltages. Different energy components in the transistor-snubber system were calculated for different snubber capacitances by analytically given functions for currents and voltages. Analytical functions are also obtained for describing the relationship between calculated energy and snubber capacitance. The obtained analytical relationship enables determination of snubber capacitance according to converter efficiency or transistor dissipation.
2. Description of boost converter and RCD snubber circuit
The boost converter is shown in figure 1. The transistor Tr is equipped with a snubber circuit which consists of capacitor Ccs, resistor Rs and diode Ds.
tains some parasitic elements as capacitances Cos, Cgd and Cos. The last one must be taken into consideration in the snubber circuit design, although it is not directly stated by the manufacturer in the data sheet. The value of the unknown capacitor Cos is calculated by the suggested method.
Figure 1. The boost converter with RCD snubber.
The typical waveforms of inductor current /l, voltage ul and drain current io during the converter operation are shown in figure 2.
OFF
(a)

i
(a)
-.Jt-Ds:
S\vitchiiig-on
r;...........
(b)
(b)
swilciiuu.'-oa inieival 'hiün . ^.'min	ii)
s\\ ilching-otr inlerval
(c)
Figure 2. The typical waveforms of the boost
converter (a) the inductor voitage ul (b) the inductor current i^ (c) the transistor current Id.
A parallel snubber circuit is used to adjust the switching losses during the switching-off interval. The diode Ds connect the capacitor Ccs in parallel to the transistor during the switching-off transient. The resistance Rs protects the transistor during switching-on, limiting the discharge capacitor current. On the other hand the Rs must ensure that the capacitor Ccs will be completely discharged during the switching-on interval (figure 3b).
The MOS-FET current /o during the switching-off interval could be considered as constant. At this interval the following can be supposed /o = imax = Id (see figure 2). The MOS-FET IRF530, working at the operating point Uds = 8.55 V and Id = 0.845 A (figures 1 and 2), was used in the experimental part of the analysis. The MOS-FET itself con-
Figure 3. Switching cell of the boost converter:
(a)	MOS-FET without snubber,
(b)	the snubber circuit operation.
Measurements were performed by the different values of capacitor Ccs (table 1) in the circuit (figure 3b). Current io and voltage uds were measured from the beginning of the switching-off interval at f = 0 to the end of the transition interval at fx = 1 ■ 10"® s and they are shown in figure 4.
n	Ccs[nF]
1	0
2	2.7
3	3.4
4	7.1
5	10
Table 1. Selected values of snubber capacitors.
iolA]
0.8
0.4

V
, measured current in
^approximated current
0.5-10
y measured voltage uds
MO
,-6 t[s]
Figure 4. The switching-off transient; measured and approximated currents io and voltages uds.
Analytical formulation of measured current and voltage is needed for further analysis of the snubber circuit. It is obvious that both shapes can not be replaced by a linear function, therefore, nonlinear analytical exponential functions with the prescribed structure (1) and (2) are used to calculate the time-dependent current and voltage.
U{t) = 021 +	+
(1) (2)
The unknow/n parameters ö^^ are calculated separately
for the each measured current and voltage pattern using the approximation procedure described in the next section. They are given in Appendix 1. Current /o and voltage Uds calculated by equations (1) and (2) are shown in figure 4. The agreement between the measured and calculated current and voltage waveforms seems to be acceptable.
The advantage of the analytical description of the measured current and voltage by (1) and (2) is the possibility of further analytical calculation.
3. Calculation of approximation function parameters
Measured current and voltage patterns were approximated by the analytical functions (1) and (2). The parameters
) appearing in (1) and (2) were determined by an optimisation method based on differential evolution. Differential evolution is a stochastic search method (Price 1996). The optimisation routine, originally developed for the surface approximation (Težak et al. 2002), was implemented in MATU\B™. The routine inputs are the measured current or voltage patterns. The differential evolution minimisation algorithm is applied to the routine searching the unknown
Ccs-2.7nF
0,5 iO
MO
Figure 5.
Voltage waveforms for different values of snubber capacitor.
approximation parameters of the selected exponential approximation functions (1) and (2). It is minimising the total error defined as a sum of the squared errors. Error is the difference between the measured and calculated values of current or voltage in the corresponding time sample. The search process is finished when a predefined value of the objective function is reached or when the maximal number of searching steps is achieved. The outputs of the routine are the calculated parameters of equations (1) or (2).
The main advantage of measured results presentation by an analytical function is the possible calculation of function value at any point, and analytical mathematical operations such as multiplication and derivation.
4. Energy consideration
The total switching-off dissipation of the system in figure 3b depends on the value of the parallel capacitance Cs. The capacitance Cs in MOS-FET transistors consists of unknown parasitic capacitance Cos and parallel snubber capacitor Ccs , which is given by (3).
C - C + C
^s ^cs ^ ^ ds
(3)
The minimal switching-off dissipation of the whole system can be obtained by the suggested analysis of the total energy absorbed by the MOS-FET and energy stored by the snubber capacitor, which obviously depends on the value of Cos. This energy can be calculated analytically using previously explained approximation functions for the measured currents and voltages, which are measured for the different values of Ccs- The first measurement of current and voltage for Ccs = 0 nF (n = 1 in table 1) is shown in figure 4. The next four snubber capacitances were chosen around the value Cos = 7.1 nF, which were calculated according to the procedure suggested by (Williams 1987) (n = 4 in table 1). The capacitors were selected so that one of them was higher than it (10 nF ) and two of them were smaller than it ( 2.7 nF and 3.4 nF). The performed calculated energy analyses showed, that the calculated capacitance Ccs = 7.1 nF did not minimise the switching-off losses.
Four additional measurements of currents and voltages for the values of capacitance 2.7, 3.4, 7.1 and 10 nF were done afterwards. The current wave-shapes in all cases remained almost equal to the one in figure 4, as was expected. The measured voltage wave-shapes are given in figure 5 and they depend on the connected capacitance Ccs. The energy IVs stored in the capacitance Cs at the end of switching-off interval is calculated by equation (4) in the continuous time domain or by equation (5) in the discrete time domain:
W. = -L dt
Jo	™
rn

k=o	m
(4)
(5)
where the parasitic capacitance current was calculated by = Id- 'd - as follows from figures 2c and 3a, and Ts is the sampling time. Currents i^,and voltage uos are measured instantaneous values of MOS-FET (Tr) drain and diode (D) currents and drain source voltage, respectively. Currents and voltages are measured by Tektronix TDS4000 and are available as data series.
Parasitic capacitance C^^ can be determined by equation (6), taking into account that W,. = W^^ when C^^ = 0:
^DS - ^s
2W,
s c.,=o
Cr, =0
U
(6)
ds
where Uos is the steady state value of drain source voltage on the MOS-FET, and Cos is the snubber capacitance.
Further analysis of switching losses is based on the known value of parasitic capacitance Cos, therefore, it has to be determined first. The energy lA/s stored in the parasitic capacitance Ccs is calculated by (5) which gives Ws(Ccs=0)=0.04752 i^J; capacitance Cds=1.3 nF is calculated afterwards by (6).
The energy Wjr supplied to the system during the switching-off interval is calculated as energy absorbed by transistor, either by equation (7) in the continuous time domain or by equation (8) in the discrete time domain.
Wjy =
^DS 'VJ
■indt

k=0
m
(7)
(8)
The total energy Wjot absorbed in the system during the switching-off process is obtained as a sum of the energy stored in the snubber capacitor lA/cs, and the energy absorbed by transistor Wjr using equation (9) for five different values of capacitors Ccs (see table 1).

tot

(9)
The above-mentioned energies were calculated using equations (4) to (9). These results are shown in tables 2 and 3. The energy values in table 2 are calculated directly from the measured current and voltages. The energies in table 3 are calculated by using approximation functions of currents and voltages, which are plotted by the dashed lines in figures 4 and 5. The disturbing influence of the measuring noise on the calculated energy has been eliminated using the described method in which the determined analytical functions are used to calculate the energy. The corresponding values of Wcs in table 2 and 3 are the same, because they are calculated from the steady state value of voltage Uos, which is the same in all cases (L'os=8.55\/). The values of lA/ir shown in table 2 differ slightly from that ones in table 3, because they were calculated by the measured currents and voltages containing noise. The differ-
ence between results in tables 2 and 3 is indeed negligible, therefore, the results from table 3 will be used further on.
Cs[nF]	ws[nJ]	Wt,[hJ]	Wtot[hJ]	0.9
1.3	0.04752	0.91034	0.9579	
				0.«
4	0.14621	0.77014	0.9164	
4.7	0.17179	0.78189	0.9537	0.7
8.4	0.30703	0.69078	0.9978	
11.3	0.41303	0.69115	1.1042	
Table 2. Calculated values of energy (calculated directly by measured data).
Cs[nF]	WsfnJ]	WTr[nJ]	Wtot[hJ]
1.3	0.04752	0.91193	0.9595
4	0.14621	0.78064	0.9268
4.7	0.17179	0.78861	0.9604
8.4	0.30703	0.70085	1.0079
11.3	0.41303	0.68446	1.0975
Table 3. Calculated values of energy (calculated by approximation functions).
The values of total energy Wtqt and the energy absorbed by transistor VJjr, taken from table 3, are indicated by the cross marks of the graph in figure 6. The marked energies were approximated by analytical functions (10) and (11) in a similar way as was done by the basic functions (1) and (2) for the measured currents and voltages in section 2.
W,or{Cs) = h,,	(10)
= (11)
The values of the calculated coefficients b(.) for V^tot(Cs) and WrriCs) are given in appendix 2. Calculated functions WiriCs) and Wtot{Cs) from the data in table 3 are shown in figure 6 as solid lines. It is necessary to note that it is impossible to obtain the energy value for the capacitance Cs < Cos by the measurement of current and voltage, because parasitic capacitance Cos in case of MOS-FETs is always different to zero. The values of both functions WrriCs) and WtoACs) at point Cs = 0 nF can be obtained by the extrapolation of functions (10) and (11) to the hypothetical point where Wn = Wtot. The dashed lines in figure 6 were obtained by the above-mentioned extrapolation.
The value WtoACs =0) = 1.001 pJ is used as a base for normalization further on.
0 1 2 3 4 5 6 7 s y 10 n Cs[llF|
Figure 6. Graph of functions \N7oi(Cs) and VVjrfCsj
Per-unit (p.u.) values of energy from table 3 are shown in table 4. The energies are normalised by the energy WtoAO) = Wtot{Cs =0) using equation (12).
Wtot	„ Wror		
	Wror (0) ■	wj., = WroriO)	(12)
Cs[nF]	VVs	wt,	Wtot
0	0	1	1
1.3	0.04747	0.9112	0,9585
4	0.14606	0.77986	0.9259
4.7	0.17162	0.78782	0,9594
8.4	0.30672	0.70015	1.0069
11,3	0.41262	0.68378	1.0964
Table 4. Calculated values of normalised energy (calculated by approximation functions).
As the total energy functions wtoACs) and wtACs) are analytical functions of the form (10) and (11) with the known parameters , the minimum of wtoACs) can be calculated analytically by the expression (13).
d yi'ror(Cs) „ q
dC s
C s
(13)
The minimum of the total energy wror in point "O" (figure 7) is reached by the capacitance Cs = 3.4 nF which gives the snubber capacitor Ccs = 2.1 nF, due to equation (3).
The dissipation decrease Awtot at point "O" in figure 7 is around 6%, while the dissipation decrease Aw/jr on the transistor is around 20 %. Moreover, if the snubber capacitance Ccs = 6.5 nF is used, the efficiency of the converter at point "P" is exactly the same as in the hypothetical case where Cs = 0 nF. However, the transistor dissipation wror is decreased by almost 30 %.
0.9
0.8
0.7,
		
		
		
		
0 1 2 3 4 5
^ 8 9 !0 Cs[nF]
Figure 7. Graphs of normalised functions WToifCsj and WTrfCsj
5. Conclusion
The proper design of a snubber circuit can considerably decrease the total power dissipation on the transistor. The methods forthe evaluation of switching-off dissipation suggested in the literature are inappropriate in the case of MOS-FETs, because of the presumption that current and voltage during the switching-off interval can be expressed by a linear function. A new approach to the design of snubber circuits for low power dc-dc converters, based on the experimental analysis of measured currents and voltages is suggested in this paper. Currents and voltages are measured for different values of snubber capacitance and they are approximated by the corresponding analytical functions, in a way that the difference between measured and calculated values becomes minimal in the quadratic sense. The energy values are calculated for the different snubber capacitances by analytically given currents and voltages. The
function describing relationship between the energy and the snubber capacitance is also determined by an approximation. The obtained analytical function enables calculation of proper snubber capacitance regardless of whether the MOS-FET switching-off dissipation or total switching-off dissipation of the snubber circuit is minimised. The only disadvantage of the suggested method is that a certain number of current and voltage measurements are required. The objective of future work will be finding out relationships between the parameters of approximation functions for energy and the MOS-FET data from the data sheet directly, to avoid extensive measuring and calculations.
References
/1/ McMurray, W., 1980. Selection of snubbers and clamps to optimise the design ot transistor switching converters. IEEE Trans. Ind. Appl., IA-16, 513-523.
/2/ Mohan, N., Undeland, T., Robbins, W., 1989. Power Electronics, Devices, Converter, Application and Design (NewYorl<, Singapore, Toronto, Brisbane: John Wiley & Sons).
/3/ Price, K. v., 1996. Differential evolution: a fast and simple numerical optimizer. 1996 Biennial Conference of the North American Fuzzy Information Processing Society, NAFIPS, eds. Smith, M,, Lee, M., Keller, J., Yen, J., {New York, IEEE Press), 524-527.
/4/ Rashid, M. H., 1993. Spice for Power Electronics and Electric Power (Englewood Cliffs, New Jersey: Prentice Hall).
/5/ Težak, O., Štumberger, G., Poljžer, B., Dolinar, D., 2002. Advanced methods in surface approximation. Advances in computer cybernetics, vol. XI, Papers from the 14"^ International Conference on Systems Research, Informatics and Cybernetics, edit. Lasker, G. E..(Windsor, Ontario, Canada: IIASSRC), 20-24.
/6/ Williams, B, W., 1987. Power Electronics, Devices, Drives and Application (London, UK: IvIacMillan Education Ltd.).
Appendix 1
Coefficients a(.) of the equations (1) and (2).
ail	ai2	ai3
0.028357	0.93109	-9452981.3417
n	Ccs [nF]	an+1,1	an+1,2	an+1,3	an-H,4	an+1,5
1	0	8.3082	-9177.9403	-8142542.4133	9164.3296	-8127151.164
2	2.7	8.176	-12610.1669	-6149625.3087	12596.7656	-6141240.3854
3	3.4	8.052	-12919.3637	-5613668.9851	12906.3012	-5606118.774
4	7.1	7.5534	-10200.2252	-5376230.2305	10188.0022	-5367087.3051
5	10	6.5299	-9817.926	-4035161.8147	9807.0537	-4027274.4877
Appendix 2
Coefficients b(.) of the equations (10) and (11).
bil	bi2	bi3	bi4	bi5
414.489 10'®	-413.859 10"®	-9.2579 10"^	0.36945 10"®	-0.21646
b2i	b22	b23
0.6561 10"®	0.3429310"®	-0.23016
dr. Oto Težak, univ. dipl, inž el. prof. dr. Drago Dolinar, univ. dipl. inž ei. prof, dr Miro Milanovič, univ. dipl. inž el.
Univerza Mariboru, Fakulteta za elektrotehniko, računalništvo in informatiko.
Smetanova 17, 2000 Maribor, Slovenija Telefon: +386.2.2207000, Fax: +386.2.2511178 Email: tezak@uni-mb.sl, dolinar@uni-mb.sl, mlianovic@uni-mb.sl
Prispelo (Arrived): 08.04.2005
Sprejeiv (Accepted): 12.06.2005