Computer-Aided Modeling and Simulation of Fabrication Steps in Semiconductor Processes
Računalniško podprto modeliranje in simulacija tehnoloških korakov v polprevodniški tehnologiji
Runovc Franc, Faculty of Natural Science and Technology, Ljubljana
lNe present some problems in the modeling and simulation of the metallurgical processes in modem VLSI technologies on silicon. First, basic layers and interfaces as encountered in scaled building blocks of these circuits are presented and their technological applications are briefly described. Next, computer softvvare and hardvvare implementations of relevant simulation tools are described and certain hardvvare platforms are evaluated, based on the CPU tirne for a typical process simulation, vvhere the disk l/O is negligible. Finally, tvvo examples are presented from simple process steps in the unipolar silicon technology.
Key vvords: microelectronics, process-modeling, technology CAD for silicon
V članku so predstavljeni nekateri problemi modeliranja in simulacije metalurških procesov v modernih tehnologijah VLSI na silicijevi osnovi. Najprej so na kratko predstavljene osnovne plasti in njihovi medsebojni stiki, kot jih srečamo v osnovnih, pomanjšanih gradnikih teh vezij kakor tudi njihova tehnološka uporaba. Nato so opisane računalniške strojne in programske zahteve za posamezna uporabljana simulacijska orodja. Na.osnovi časov centralne procesne enote so izvrednotena nekatera tipična strojna okolja, kjer lahko zanemarimo vhodno/izhodne operacije na disku. Na koncu sta prikazana dva primera enostavnih procesnih korakov v unipolarni tehnologiji na siliciju.
Ključne besede: mikroelektronika, modeliranje procesov, računalniško podprto načrtovanje tehnologij na siliciju
1.	Introduction
Modern technologies for fabricating discrete and integrated semiconductor devices involve a large number of operations vvhich include the preparation of the base crystalline material (like Si or Ga As) as vvell as many other steps - like epitaxy, oxidation, ion implantation, dopant diffusion, thin film deposition - vvhich ali require dedicated equipment in order to provide the needed environment and/or high temperature.
The basic materials used in semiconductor technologv include both inorganic and organic as vvell as crystalline and non-crystalline substances in both elemental or compound form in order to produce the semiconductor element or circuit and its package. According lo this statement one can plače this technol-ogy in the broad and complex field of material seience or even apply the term the micro-metallurgv to it.
2.	Basic Technologies
The building elements for complex integrated circuits (IC) are in fact very simple (and very small - the minimum feature length is less than 0.5um) three-dimensional electronic compo-nents - like bipolar an unipolar transistors, diodes, resistors and capacitors sharing the same substrate vvhile their interconnec-tions provide the desired digital and/or analog system functions.
In order to obtain these elements one needs the follovving materials and/or layers:
*	the electronic-grade base material and vvafer preparation
*	the semiconducting p- and n-type material
*	the multi-level conducting lavers vvith diffusion barriers
*	the isolation layers
*	other material structures and techniques. as required by the spe-cific technology.
These layers and their respective interfaces are depicted in Table 1
The base material for modern very-large-scale-integration (VLSI) technologv are vvafers. cut from the already-doped ingots prepared bv the Czochralski technique. The relative concentration of ali unintentional impurities in EGS silicon must be typi-cally bellovv 10". Silicon epitaxy, vvhen applied to grovv a crys-talline film on a crystalline substrate, has several advantages over bulk silicon vv afer. The grovvth rate can be limited by either the surface chemical reaction or by the transport of the reactants across the boundary laver. The electrically-active volumes of an IC must include a certain amount of n- or p-type dopants vvhich are introduced by the means ofthe ion implantation or by the diffusion from different sources. The impurity distribution has an important influence on the electrical behavior of the device and
procesna plast	kontakti, povezave, difuzijske zapore	izolatorji	polprevodniki
process laver	contacts. interconnect. diffusion harries	isolators	semiconductors
photoresist	(doped) polv-Si	Si-.N,	crystalline Si
	silicides. nitrides. carbides	(doped) SiO,	implanted/doped Si
	Al, Al+Cu. Al+Cu+Si	Si.N.O	epitaxial Si
refractory metals			
Table 1. Typical lavers and interfaces in advanced silicon 1C technologv
Tabela 1. Značilne plasti in prehodi med njimi v napredni polprevodniški tehnologiji na siliciju
we must have ways to predict this distribution after ali the process steps are performed. This prediction becomes very com-plex since the diffusion of dopants in silicon must be treated in parallel with the transport of the points defects in silicon2 '. The modeling and simulation of the initial distribution after the ion implantation is, for example much simpler even when second-or-der effects are taken into the consideration4,5. The dielectric layers have an important role in the physical structure of the IC. These layers provide the necessary electrical isolation among electrically-active volumes within the IC. they are used as di-electrics in the capacitor structures and they form the isolation layers between the conductive layers, while they are also used as required by the particular process technique (like. for example, in locallv oxidized Si (LOCOS) structures). They can grow di-rectlv over the silicon - like SiO, or Si,N4 - or can be deposited in the plasma-assisted environment or by the low-pressure chemical vapor deposition (LPCVD) technique (for poly-Si and Si,N4). The formation process does, however, affects the chemical, physical and electrical properties of the layers as well as the distribution of the dopants in the silicon structure. In fact, the diffusion engineering can be performed by the proper choice of the layer above the silicon substrate. The conductive layers provide the necessary interconnects among basic electric elements of the celi of an IC as well as the required interconnects among the cells in order to obtain the desired characteristics of the complete IC. In order to obtain these conductive films we use the evaporation, sputtering and CVD for Al. Mo and W or codeposition (and re-action) for the silicides of Mo. Ta, Ti, W and Co. These teeh-niques do, however. exhibit metallurgical interconnection prob-lems associated with grain-boundary diffusion. The new epitaxial methods in forming silicide and Al layers might im-prove the contact metallization in ICs.
silicide / silicid
/
diffusion barrier poly-Si difuzijska zapora poli-Si
Si substrate / osnova Si
photolitographic technique is applied. In the situation vvhen the minimum feature size is comparable vvith the vvavelength of light, a tvvo-dimensional dedicated process simulator can be used in order to study the optical pattern transfer. Similar modeling and computer simulation must be used vvhen the dry (plasma) etching methods are studied since the vertical and horizontal dimensions are comparable.
3. Computer Models and Implementation
The necessary equipment in semiconductor technology is in most cases very complex and expensive because it is dedicated to the volume production of electronic and optical devices. Together vvith the cost of the dedicated production areas - knovvn as the clean room - the complete technology does not allovv many experiments and technology development ecame very computer-oriented even in the past vvhen the computation costs (measured in e.g. USD/MFLOPS) vvere much higher than at the present'17 The second reason for using more povverful computer resources is the need to perform the simulations in two or even three spa-tial dimensions. Sueh simulations are needed because of the in-tegration of devices vvhich in turn become smaller and smaller and the role of the lateral dimension becomes comparable to the role of the vertical dimension in the physical structure of the complete device. The basic idea behind these requirements is the possibility of the computer-assisted integration of ali softvvare tools needed in the development cycle of a nevv integrated cir-cuit. The use of sueh a na log work-stations> (the term deseribes both the hardvvare and the softvvare needed to design both the cir-cuit and/or technology for both analog and/or digital ICs) is to-day possible and can provide the feedback in the desigtt/devel-opment/manulacturing eyele, the vievv-port into micro-space and the repository for accumulated knovvledge.
Figure 1. A schematic structure of a unipolar transistor celi Slika 1. Struktura celice unipolarnega transistorja
Figure 1 shows a typical structure of a unipolar transistor vvhere ali metallurgicaly interesting parts are shovvn. In order to obtain this composition of layers and the required patterns, the
......i 1 ■ ■ 1 i 1 ' ...................
0 20 40 60 80 100 120 140 160
time / čas [s]
Figure 2. Relative performance of several engineering computer
systems for TCAD Slika 2. Primerjava zmogljivosti nekaterih računalniških sistemov za TCAD
Figure 3. SEM cross-section of a unipolar transistor (the marker shows lpm)
Slika 3. Presek SEM unipolarnega transistorja (marker: lpm)
Although it is almost impossible to evaluate the tvvo-dimen-sional impurity profile in the active volumes of the device, one can at least compare this picture with the simulated impurity profile from Figure 4 if the metallurgical junction depth is in the question.
The surface topography of the photoresist patterns effects the transfer and the shape of the etched areas and frequently even the electrical characteristics of the integrated celi. Figure 5 shovvs a SEM cross-section of a photoresist line over an oxidized poly-Si line.
The standing-vvave effect is clearly evident and again simulated vvith a lithography simulation program. Figure 6.
5. Conclusions
The role of computer modeling and simulations in the semiconductor teehnology is very important becausc of small physi-
These simulation programs follovv the traditional approach, used in the engineering applications. With the front end, the user defines the geometry, materials, initial and boundary conditions. The core solves the relevant transport equations (for e.g. charge carriers or impurities and defects) using a numerical procedure based on finite elements or on finite differences, vvhile the post-processor is used for data presentation and analysis. In order to transfer the data betvveen different programs, a common format for input/output (data and/or graphic) files is used.
Finally, the models and their softvvare implementation must be addressed from the vievv-point of computer hardvvare. The comparative results shovv that today most of the programs can be used on a graphic vvork-station (using scalar compilers and the X-Windows environment) or on a high-performance personal computer. In our laboratory we are using a high-performance vvork-station as a server together vvith high-performance personal computers on a net-work. The performance of some other computer system for TCAD (Technology Computer Aided Design) are presented in Fig. 2 for the čase of 1-dimensional process simulation. Some older computers are included only in order to illustrate the influence of the computer development in the area ofthe TCAD.
4. Examples
In order to illustrate the TCAD/vvork-station approach we examine tvvo cases vvhich are common in modern unipolar IC processing. Figure 3 is a SEM photo of a single transistor cross-section vvhere some of the important metallurgical layers, as depicted in Figure 1, can be observed.
Figure 4. Simulated tvvo-dimensional impurity profile (x- and y-dimensions in pm) Slika 4. Simulirana dvodimenzionalna struktura (x- in y-dimenzije v pm)
-1.0 1-'-1-'-1-'-1-'—1-'—
0 0 0.2 0.4 0.6 0.8 1.0
dimension / dimenzija x [pm]
Figure 6. Simulated topography of the photoresist line after the development cvcle Slika 6. Simulirana topografija fotopolimera po razvijanju
Figure 5. SEM cross-section of a photoresist line over the oxidized poly-Si after the development cycle
Slika 5. Presek SEM fotopolimerne linije na oksidiranem poli-Si
oxide / oksid
cal dimensions and because of complex inter-related physical processes. The adequate feedback from the experiments is necessary. Modern work-station with their high computing throughput offer an excellent hardware platform for these com-putationally intensive simulations at least in two space dimensions. It is expected that more powerful computers are required when three space dimensions must be considered.
6. References
1	Sze, S. M., VLSI Technologr, McGraw-Hill, Nevv York, 1988
2	Law, M. E., Tvvo Dimensional Numerical Simulation of Impurity Diffusion in Silicon, PhD Dissertation, Stanford Electronics Laboratories, Stanford University - Stanford. CA, 1988
1 Fahey, P. M., Point defects and dopant diffusion in silicon, Rev. Mod. Phys„ 61, (1989) 2
4	Cole. D. C. et al., The Use of Simulation in Semiconductor Technology Development, Solid-State Electronics. 33, (1990) 6, 591-623
5	Eckstein, E., Computer Simulation of lon-Solid Interactions, Springer-Verlag, Berlin, 1991
6	Runovc, F. and Kosec, L., Computer Modeling of Ion Implantation in Modification of Material Surface Properties, Kovine Zlitine Tehnologije, 27, (1993) 1-2, 181-184
7	Singer, P. H., Process Modeling and Simulation, Semiconductor International, (1988) febr., 74-80
s Strojwas, A. J. and Director, S.W., VLSI: linking design and manufacturing, IEEE Spectrum, (1988) Oct., 24-28
9 Runovc, F., Integration ofTools for TCAD: A Work-Station Approach, MIEL-SD 92 Proceedings, pp. 183-188, Portorož. Slovenia, October 1992