Original scientific paper
Informacije ïmidem
Journal of Microelectronics,
Electronic Components and Materials Vol. 46, No. 1(2016), 24 - 28
Temperature and process compensated RFpower detector
Milenko Milicevic1,2, Branislava Milinkovic12, Dorde Simic2, Dušan Grujic1, Lazar Saranovac1
1School of Electrical Engineering, University of Belgrade, Belgrade, Serbia 2TES Electronic Solutions, Stuttgart, Germany
Abstract: This paper describes the design of process and temperature compensated wide band radio frequency power detector in a standard UMC 0.13-^m RF CMOS process. Proposed power detector core consists of two RF NMOS transistors biased for operation in weak inversion and output signal of the power detector core is a linear function of input RF peak voltage and residual temperature dependence. Additional compensation circuit is designed in order to make the output voltage less sensitive on temperature and process variation. Power detector circuit has 20 dB of the dynamic range and is especially suitable for use in transmitter chain applications. The temperature compensation provides typical reduction of 50% in temperature sensitivity of the circuit.
Keywords: RF power detector; temperature compensation; weak inversion; Bessel function; compensation circuit
Temperaturno in procesno kompenziran RF detector moči
Izvleček: Članek opisuje dizajn procesno in temperaturno kompenziranega detektorja moči širokopasovne radio frekvence v standardni UMC 0.13-^m RF CMOS tehnologiji. Jedro detektorja se sestoji iz dveh RF NMOS tranzistorjev za delovanje v slabi inverziji. Izhodni signal detektorja je linearna funkcija vhodne RF napetosti in ostanka temperaturne odvisnosti. Dodatno kompenzacijsko vezje znižuje temperaturno in procesno odvisnost. Dinamično območje detektorja moči je 20 dB in je posebej primeren za uporabo v prenosnih verigah. Temperaturna kompenzacija tipično za 50 % zmanjša vpliv temperature.
Ključne besede: RF detektor moči; temperaturna kompenzacija; šibka inverzija; Besselova funkcija; kompenzacijsko vezje
* Corresponding Author's e-mail: milenko.milicevic@tes-dst.com
1 Introduction
Power detectors are widely used in wireless communication systems, in receiver and transmitter chain. Optimal gain setting of the receiver chain is highly dependent on the power level of the input signal. In order to meet optimum gain, power level of the input signal should be measured in real time and appropriate gain adjustment of the receiver chain should be performed. Characteristic for this application is that it requires the dynamic range of power detector circuit exceeding 50 dB or more.
In many applications transmitter should be capable to operate with variable peak level of the output power. In order to obtain accurate power gain control, power detector should be employed in the control feedback loop [1]. Power detectors are also used for: power amplifier emergency shutdown in case of high VSWR [2],
predistortion linearization of power amplifier using envelope-feedback [3], or as a part of system for envelope elimination and restoration power amplifier [4].
Power detectors for transmitter applications have relaxed dynamic range requirements compared to those employed in receiver, but other factors may be of importance. Self-heating of the power amplifier affects the performance of power detectors by changing their accuracy [5]. In order to have temperature independent behavior, power amplifier and power detector are usually designed together due to the large mutual influence [5]. Another constraint for power detectors is requirement for low power consumption in order to keep high level efficiency of the overall system.
There are few groups of the power detectors - mixer based [6], Schottky diode [7] and monolithic low power
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M. Miličevič et al; Informacije Midem, Vol. 46, No. 1(2016), 24 - 28
RF peak detector [8]. First two topologies are not quite suitable for CMOS RF IC implementation regarding: unavailability in standard CMOS RF process, bandwidth limitation, large chip size, high power consumption, etc.
Monolithic low power RF peak detector is most suitable for RF IC implementation due to its advantages of simplicity, wide bandwidth, low power and small chip area [8]. However, it has temperature and process dependence and wideband precision power detectors are mostly implemented in expensive bipolar technology [8].
In this paper, monolithic, low power, process and temperature independent RF peak detector has been developed. It uses NMOS transistors biased in weak inversion in order to get the exponential transistor behavior. Additional circuit for temperature and process compensation has been proposed. The new detector uses inexpensive RF CMOS technology and provides temperature and process independent power detection without post-fabrication trimming.
The paper structure is as following: the design of the power detector core circuit is presented in Chapter 2. Topology and design of the new temperature compensation circuit is presented in Chapter 3. Obtained simulation results and post processing with possible applications are presented in Chapter 4 and 5, respectively. Finally, conclusion is introduced in Chapter 6.
gers, length and their bias currents are equal I1=I2=IDC. Corresponding resistors and capacitors are matched, namely, R,=R2, R3=R4, C,=C2. In this case, the AC signal magnitude at gate M, is two times greater than at the M2 gate.
With given assumptions, instantaneous and average drain currents of transistor M, are:
vq--t vout * y m cos(afrt)
(1)

D =1 =1DC=he nV' e "V t je"r dt ==se "r e ""' 11 ~rm I' (2)
V- Vout - /
OUT. 1 Vm 1 0 , I oV
Average drain current of transistor M2 is:
(B)
Where:
Vm - peak amplitude of AC input signal VQ - gate DC voltageI0(x) - modified Bessel function of order zero
n - technology dependant sub-threshold slope parameter
From (2) and (3) it can be seen that average drain current is increased by a factor I0(Vm / Vt) when RF signal is present. Since the modified Bessel function of order zero is monotonically increasing, the average drain current monotonically increases with RF signal amplitude.
2 Proposed RF power detector
The core of the RF power detector is shown in Figure 1.
Figure 1: RF power detector core schematics
In order to obtain exponential behavior, transistors M, and M2 are biased for operation in weak inversion. Transistors have the same channel width, number of fin-
However, the average (DC) current of transistors M1 and M2 is constant, and set by current sources I1 and I2. Therefore, the average gate-source voltage Vgs must decreases for (2) and (3) to hold. This change in average Vgs due to input RF signal amplitude is the basis of power detector operation.
For large values of x, I0(x) has an asymptotic approximation:
Io(x) =
(4)
Using equations (2) and (3), the output voltage can be written as:
(S)
(ó)
If we apply approximation (4) on the equation (6), we can get:
OUI
x
e
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v nv -out ,pd = -ž- - -v- ln(2).
Where:
= ^.
q
(7)
(8)
From equation (7), it can be recognized that the average output voltage consists of two factors. First term is proportional to the peak value of the input signal, and the second term is proportional to the temperature. Temperature-dependent term can be cancelled by including an additional circuit in the design, which produces the output voltage proportional solely to the temperature. Temperature dependence of the signal described in equation (7) may be minimized to a large extent by subtracting the power detector voltage from compensation circuit output. Design of temperature compensation circuit is presented in the following section.
are equal. Furthermore, compensation circuit could be used as a current source for the power detector core.
Figure 2: Compensation circuit
3 Compensation circuit
Figure 2 presents topology of the compensation circuit that is used for compensation of the temperature dependent part in equation (7). Like in the core of the RF power detector, transistors MA and MB are operating in weak inversion. Transistor MA has the same dimensions and the same biasing conditions as transistors M, and M2 in the power detector core. The width of the transistor Mb is two times greater than the width of M, and they have same value of bias currents. Transistors MC, Md and Me operate as current mirrors and should be perfectly matched. In order to keep same drain voltages in current mirrors, transistor MF has been employed and it has to be matched with MA. Additionally, the bias resistors should also be matched, RA= RB= RE. The output current ID of the circuit in the Figure 2 is given by the equation (9).

. (9)
Output voltage of the circuit in Figure 2 is given with the following equation:
■ = vnn -
nVtRF ln(2) Re '
(12)
In order to get temperature independent signal, signals at the outputs of the power detector core and calibration circuit (given with equations (7) and (12)) should be subtracted, given the value for the compensated output voltage of the power detector circuit.
VouT - VCOMP = VdD- + "Vtt) - R- |.	(13)
If the value of the resistor RF is two times smaller than
value of Rb, we can get:
vm
v out ~ r comp = vdd	'
vout vet
(14)
From last equation it can be recognized that the output voltage is temperature and process independent.
Since transistors MA and MB are operating in the weak inversion, the output current is given with:
In =
nVttn 1 \- n Vt ln I
vgs1 - vgs2 __1, isi j_1, is2
R
R
nV, lnl ^
Id =-
Isi _ nV, ln(2)
R
R
(10)
(11)
resistor value RC should be set in a way that currents ID and IDC from detector circuit core shown in Figure 1
4 Simulation results
Based on the previous discussion power detector core and compensation circuit are designed in standard UMC 130nm CMOS RF technology. Parameters of all components are shown in Table 1.
D
R
3
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M. Milicevic et al; Informacije Midem, Vol. 46, No. 1(2016), 24 - 28
Table 1: Parameters of the components
Components	Parameter	Value
M1, M2, MA, MF	W/L [pm/pm]	2*(5/0.34)
MB	W/L [pm/pm]	4*(5/0.34)
MC, MD, ME	W/L [pm/pm]	4*(4/2.5)
RC	Resistance [O]	3922
RF	Resistance [O]	1961
RA, RB, RE, R1, R2	Resistance [O]	60000
R3, R4	Resistance [O]	25
C, C1, C2, C3	Capacitance [pF]	10
I1, I2	Current [pA]	10
Layout of complete chip is presented in Figure 3.
Figure 4 presents voltage sensitivity dVOU/dVm of the output signal performed at frequency of 5GHz. The dynamic range of the input signal amplitude can be estimated from this figure. Lower limit is determined by modified Bessel function approximation given in the equation (4). Namely, this approximation is valid for input AC amplitude greater than 0.2 V. Upper limit presents the highest peak level of the voltage input signal for which all transistors are in saturation. This voltage is determined to be 2 V, giving the operation range of the power detector of approximately 20 dB.
It can be concluded that power detector works with high amplitude level of the input signal, what is desirable for RF transmitters.
Figure 3: Power detector with calibration circuit
The power detector is simulated with and without the compensation circuit, in order to demonstrate the improvement. Simulations were performed for AC signal magnitude of 1V and frequency of 5 GHz. Improvement is reached in industrial temperature range of -40 0C to 100 0C. Maximum temperature coefficient (3Vout/3T)max is decreased about two times using this technique.
Figure 4: Voltage coefficient of the signal at the output of the power detector
Figure 5: Compensated (red) and non-compensated (green) temperature coefficient of the output signal
5 Post processing and applications
Post processing can be done in analog or digital domain. Each of these options will be discussed in the details including advantages and drawbacks as well as possible applications.
5.1 Analog post processing
Straightforward way to combine the power detector core with the compensation circuit is to use instrumentation amplifiers to perform subtracting and amplifying.
The most important parameter for the amplifiers would be input offset in order to keep high level of accuracy. Clear advantage is simple design and ability to detect input amplitude independently of process or temperature variation. Main disadvantage is small dynamic range 20dB. Although, there are some applications
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where this might be enough as; amplifier linearization techniques [9] including polar loop system [10] and amplitude envelope feedback system [10].
5.2 Digital post processing
Dynamic range might be increased using digital post processing. Power detector output voltage (6) and compensation circuit output voltage (12) could be sampled and post processed in digital domain. Parameter nVt might be extracted from (12) and be used in (6) for extraction of the amplitude Vm. Dynamic range is extended since there is no need for the asymptotic Bessel function approximation (4). Drawback would be complex design. This technique could be used for broad range of applications where temperature and process independent amplitude detection is needed.
6 Conclusion
Today, inexpensive scaling CMOS technology allows large level of integration and operation of the circuits at high frequencies. Its main disadvantage is limitation of the process control, which leads to large variation of component parameters. Wide temperature operation range limits the accuracy of power detector due to temperature-dependent terms in output voltage. In some particular cases, this limitation can be solved by using such circuit topologies which performance depends only of well controlled component matching. This paper presented design of such power detector including compensation circuit.
Using the proposed and described circuit topology, significantly lower temperature dependence of the power detector circuit has been achieved. Namely, maximum temperature coefficient is decreased about two times for input signal level between 0.2 V and 2 V. Power detector temperature dependency is minimized to the extent that it can be neglected in many industrial applications, enabling its widespread use in further designs. For applications which require higher dynamic range, digital post processing could be applied.
7 Acknowledgment
This work has been supported by SENSEIVER project founded by European Commission as a part of Marie Curie Program.
8 References
1.	Xiaofang Mu; Alon, Z.; Zhang, G.; Shiaw Chang, "Analysis of output power variation under mismatched load in Power Amplifier FEM with directional coupler", Microwave Symposium Digest, 2009.
2.	Ullrich R. Pfeiffer and David Goren," A 20 dBm Fully-Integrated 60 GHz SiGe Power Amplifier With Automatic Level Control" IEEE Journal of Solid State Circuits, vol. 42 Number 7, July 2007.V.
3.	Hyun-Min Park; Dong-hyun Baek; Jeon, Kye-Ik; Songcheol Hong, "A predistortion linearizer using envelope-feedback technique with simplified carrier cancellation scheme for class-A and class-AB power amplifiers", Microwave Theory and Techniques, IEEE Transactions on , vol.48, no.6, pp.898,904, Jun 2000.
4.	Feipeng Wang; Kimball, D.; Popp, J.; Yang, A.; Lie, D.Y.C.; Asbeck, P.; Larson, L., "Wideband envelope elimination and restoration power amplifier with high efficiency wideband envelope amplifier for WLAN 802.11g applications," Microwave Symposium Digest, 2005 IEEE MTT-S International , vol., no., pp.4 pp.,, 12-17 June 2005.
5.	Hiroyuki Nakamoto, Masahiro Kudo, Kimitoshi Niratsuka, Toshihiko Mori, and Shinji Yamaura,"A real-time temperature-compensated CMOS RF on-chip power detector with high linearity for wireless applications" ESSCIRC, page 349-352. IEEE, (2012)
6.	P. F. Da Mota and J. M. Da Silva, "A true power detector for RF PA built-in calibration and testing," in Proc. Design, Automation, & Test in Europe Conference, 2011, pp. 1-6.
7.	V. Milanovic, M. Gaitian, J.C. Marshall and M.E. Zaghloul, "CMOS Foundry Implementation of Schottky Diodes for RF Detection" IEEE Transactions on Electron Devices, vol. 43 Number 12, December 1996
8.	T. Zhang, W. R. Eisenstadt, and R. M. Fox, "A novel 5GHz RF power detector", Proc. International Symposium on Circuits and Systems, vol. 1, pp. 897-900, 2004.
9.	Steve C. Cripps "RF Power Amplifiers for Wireless Communication", Second Edition, Artech House, 2006.
10.	Steve C. Cripps "Advance Techniques in RF Power Amplifier Design", Artech House, 2002.
Arrived: 04. 12. 2015 Accepted: 02. 03. 2016
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