<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:doc-YV30RWEK</identifier><date>2002</date><creator>Maex, Karen</creator><creator>Nauwelaers, Bart</creator><creator>Ymeri, Hasan</creator><relation>documents/doc/Y/URN_NBN_SI_doc-YV30RWEK_001.pdf</relation><relation>documents/doc/Y/URN_NBN_SI_doc-YV30RWEK_001.txt</relation><format format_type="issue">1</format><format format_type="volume">32</format><format format_type="type">article</format><format format_type="extent">str. 1-5</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">3370068</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-YV30RWEK</identifier><language>eng</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="slv">integrirana vezja</subject><subject language_type_id="slv">kapacitivnost</subject><subject language_type_id="slv">mikroelektronika</subject><subject language_type_id="slv">polprevodniki</subject><subject language_type_id="slv">VLSI vezja</subject><title>CAD-oriented semi analytic approach for capacitance matrix computation of multilayer VLSI interconnects</title><title>Semi-analitični pristop izračuna kapacitivnostne matrike večslojnih povezav v VLSI vezjih primeren za računalniško podprto načrtovanje</title></Record>