Low-power dual-port asynchronous CMOS SRAM design techniques

URN:NBN:SI:doc-XUV7M3ET2007Poh-Yee, LohSoon-Hwei, TanSulaiman, Mohd ShahimanYusoff, Zubaidadocuments/doc/X/URN_NBN_SI_doc-XUV7M3ET_001.pdfdocuments/doc/X/URN_NBN_SI_doc-XUV7M3ET_001.txt237articlestr. 87-930352-90456540884URN:NBN:SI:doc-XUV7M3ETengStrokovno društvo za mikroelektroniko, elektronske sestavne dele in materialeInformacije MIDEMInCCMOSelektrična vezjamikroelektronikaSRAMLow-power dual-port asynchronous CMOS SRAM design techniques