<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:doc-VMGNZ0TI</identifier><date>2003</date><creator>Bürmen, Arpad</creator><creator>Puhan, Janez</creator><creator>Tuma, Tadej</creator><relation>documents/doc/V/URN_NBN_SI_doc-VMGNZ0TI_001.pdf</relation><relation>documents/doc/V/URN_NBN_SI_doc-VMGNZ0TI_001.txt</relation><format format_type="issue">3</format><format format_type="volume">33</format><format format_type="type">article</format><format format_type="extent">str. 149-156</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">4110676</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-VMGNZ0TI</identifier><language>eng</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="slv">algoritmi</subject><subject language_type_id="slv">hevristične metode</subject><subject language_type_id="slv">integrirana vezja</subject><subject language_type_id="slv">načrtovanje</subject><title>Heuristic approach to circuit sizing problem</title></Record>