<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:doc-V1F2T75U</identifier><date>2002</date><creator>Bratkovič, Franc</creator><creator>Bürmen, Arpad</creator><creator>Fajfar, Iztok</creator><creator>Puhan, Janez</creator><creator>Strle, Drago</creator><creator>Tuma, Tadej</creator><relation>documents/doc/V/URN_NBN_SI_doc-V1F2T75U_001.pdf</relation><relation>documents/doc/V/URN_NBN_SI_doc-V1F2T75U_001.txt</relation><format format_type="issue">3</format><format format_type="volume">32</format><format format_type="type">article</format><format format_type="extent">str. 149-156</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">3371348</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-V1F2T75U</identifier><language>eng</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="slv">dimenzioniranje</subject><subject language_type_id="slv">integrirana vezja</subject><subject language_type_id="slv">kazenske funkcije</subject><subject language_type_id="slv">optimiranje</subject><subject language_type_id="slv">računalniško načrtovanje</subject><title>Penalty function approach to robust analog IC design</title><title>Robustno načrtovanje analognih integriranih vezij z uporabo kazenskih funkcij</title></Record>