URN:NBN:SI:doc-RTWG0XZ42003Akil, Mohameddocuments/doc/R/URN_NBN_SI_doc-RTWG0XZ4_001.pdfdocuments/doc/R/URN_NBN_SI_doc-RTWG0XZ4_001.txt334articlestr. 267-2750352-90454310356URN:NBN:SI:doc-RTWG0XZ4engStrokovno društvo za mikroelektroniko, elektronske sestavne dele in materialeInformacije MIDEMInCalgoritmiarhitektura (računalnik)FPGA vezjaoptimiranjesinteza vezjaHigh-level synthesis based upon dependence graph for multi-FPGA