<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:doc-PSLT5W2V</identifier><date>2011</date><creator>Verber, Domen</creator><relation>documents/doc/P/URN_NBN_SI_doc-PSLT5W2V_001.pdf</relation><relation>documents/doc/P/URN_NBN_SI_doc-PSLT5W2V_001.txt</relation><format format_type="issue">4</format><format format_type="volume">41</format><format format_type="type">article</format><format format_type="extent">str. 257-263</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">16235798</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-PSLT5W2V</identifier><language>eng</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="slv">EDF</subject><subject language_type_id="eng">embedded systems</subject><subject language_type_id="slv">FPGA</subject><subject language_type_id="slv">razvrščanje opravil</subject><subject language_type_id="eng">real time</subject><subject language_type_id="slv">realni čas</subject><subject language_type_id="eng">task scheduling</subject><subject language_type_id="slv">vgrajeni sistemi</subject><title>Aparaturna izvedba razvrščanja opravil po strategiji najbližjega skrajnega roka</title><title>Hardware implementation of an earliest deadline first task scheduling algorithm</title></Record>