<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:doc-I441TNHH</identifier><date>2024</date><creator>Bürmen, Arpad</creator><creator>Fajfar, Iztok</creator><creator>Kunaver, Matevž</creator><creator>Puhan, Janez</creator><creator>Rojec, Žiga</creator><creator>Tomažič, Sašo</creator><creator>Tuma, Tadej</creator><relation>documents/doc/I/URN_NBN_SI_doc-I441TNHH_001.pdf</relation><relation>documents/doc/I/URN_NBN_SI_doc-I441TNHH_001.txt</relation><format format_type="issue">4</format><format format_type="volume">54</format><format format_type="type">article</format><format format_type="extent">str. 271-281</format><identifier identifier_type="DOI">10.33180/InfMIDEM2024.404</identifier><identifier identifier_type="COBISSID_HOST">216529411</identifier><identifier identifier_type="ISSN">2232-6979</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-I441TNHH</identifier><language>eng</language><publisher publisher_location="Ljubljana">MIDEM</publisher><source>Informacije MIDEM</source><rights>BY</rights><subject language_type_id="eng">analog circuits</subject><subject language_type_id="slv">analogna vezja</subject><subject language_type_id="eng">circuit simulation</subject><subject language_type_id="eng">compact models</subject><subject language_type_id="eng">hardware description langugage</subject><subject language_type_id="slv">jezik za opisovanje strojne opreme</subject><subject language_type_id="slv">kompaktni modeli</subject><subject language_type_id="slv">simulacija vezij</subject><subject language_type_id="slv">Verilog-A</subject><title>Free software support for compact modelling with Verilog-A</title><title>Odprtokodna programska oprema za uporabo kompaktnih modelov v jeziku Verilog-A</title></Record>