<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:doc-F3C75CLM</identifier><date>1938</date><relation>documents/doc/F/URN_NBN_SI_doc-F3C75CLM_001.pdf</relation><relation>documents/doc/F/URN_NBN_SI_doc-F3C75CLM_001.txt</relation><relation>documents/doc/F/URN_NBN_SI_doc-F3C75CLM_001.xml</relation><format format_type="main">2 strani</format><identifier identifier_type="COBISSID">31596291</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-F3C75CLM</identifier><language>slv</language><publisher>Uprava za zaštitu industriske svojine</publisher><source>Elektrotehnika</source><rights>PDM</rights><scans>id-31596291_082_scn-001.jp2</scans><scans>id-31596291_082_scn-002.jp2</scans><title>patentni spis br. 13979</title><title>Postupak za izradu elektroda sa velikom površinom</title><title>Razred 21 (Oddelek 2)</title></Record>