{"?xml":{"@version":"1.0"},"edm:RDF":{"@xmlns:dc":"http://purl.org/dc/elements/1.1/","@xmlns:edm":"http://www.europeana.eu/schemas/edm/","@xmlns:wgs84_pos":"http://www.w3.org/2003/01/geo/wgs84_pos","@xmlns:foaf":"http://xmlns.com/foaf/0.1/","@xmlns:rdaGr2":"http://rdvocab.info/ElementsGr2","@xmlns:oai":"http://www.openarchives.org/OAI/2.0/","@xmlns:owl":"http://www.w3.org/2002/07/owl#","@xmlns:rdf":"http://www.w3.org/1999/02/22-rdf-syntax-ns#","@xmlns:ore":"http://www.openarchives.org/ore/terms/","@xmlns:skos":"http://www.w3.org/2004/02/skos/core#","@xmlns:dcterms":"http://purl.org/dc/terms/","edm:WebResource":[{"@rdf:about":"http://www.dlib.si/stream/URN:NBN:SI:doc-DH1QX1KZ/24cf0b57-b26b-45d9-b447-096456f95242/PDF","dcterms:extent":"937 KB"},{"@rdf:about":"http://www.dlib.si/stream/URN:NBN:SI:doc-DH1QX1KZ/89eabbe5-182b-4cc2-a2f1-475b780443fc/TEXT","dcterms:extent":"44 KB"}],"edm:TimeSpan":{"@rdf:about":"1985-2025","edm:begin":{"@xml:lang":"en","#text":"1985"},"edm:end":{"@xml:lang":"en","#text":"2025"}},"edm:ProvidedCHO":{"@rdf:about":"URN:NBN:SI:doc-DH1QX1KZ","dcterms:isPartOf":[{"@rdf:resource":"https://www.dlib.si/details/URN:NBN:SI:spr-Z2J12Z6C"},{"@xml:lang":"sl","#text":"Informacije MIDEM"}],"dcterms:issued":"2002","dc:creator":["Brezočnik, Zmago","Časar, Aleš","Kapus, Tatjana"],"dc:format":[{"@xml:lang":"sl","#text":"številka:3"},{"@xml:lang":"sl","#text":"letnik:32"},{"@xml:lang":"sl","#text":"str. 171-180"}],"dc:identifier":["ISSN:0352-9045","COBISSID:7703318","URN:URN:NBN:SI:doc-DH1QX1KZ"],"dc:language":"en","dc:publisher":{"@xml:lang":"sl","#text":"Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale"},"dc:subject":[{"@xml:lang":"sl","#text":"digitalna vezja"},{"@xml:lang":"sl","#text":"testiranje"},{"@xml:lang":"sl","#text":"zatične napake"}],"dcterms:temporal":{"@rdf:resource":"1985-2025"},"dc:title":{"@xml:lang":"sl","#text":"Exploiting symbolic model checking for sensing stuck-at faults in digital circuits| Uporaba simboličnega preverjanja modelov pri zaznavanju zatičnih napak v digitalnih vezjih|"},"dc:description":[{"@xml:lang":"sl","#text":"This paper presents algorithms for automatic test pattern generation for discovering stuck-at faults in sequential digital circuits or proving that there are no stuck-at faults in the given circuit. A circuit is represented as a finite state machine. Properties for stuck-at faults expressed with CTL formulas which are valid in the circuit with stuck-at faults and generally not valid in the good circuit are generated. Validity of the formulas is checked by symbolic model checking, and for invalid formulas counterexamples are constructed which guide the circuit to the states which prove the absence of stuck-at faults. Test patterns guide the circuits exactly as the counterexamples. Experimental results for a set of benchmark circuits togetherwith the time and space complexity analysis of the algorithms are also given"},{"@xml:lang":"sl","#text":"V članku predstavljamo algoritme za avtomatsko generiranje testnih vzorcev, s pomočjo katerih pri sekvenčnih digitalnih vezjih odkrivamo zatične napake oziroma pokažemo, da zatičnih napak v danem primerku vezja ni. Vezje predstavimo kot končni avtomat. Za zatične napake generiramo lastnosti v obliki formul CTL, ki so veljavne v vezju z zatičnimi napakami in praviloma neveljavne v dobrem vezju. S simboličnim preverjanjem modelov preverimo veljavnost formul in za neveljavne formule skonstruiramo protiprimere, s katerimi vezje pripeljemo v stanja, ki dokažejo odsotnost zatičnih napak. Testni vzorci so sestavljeni tako, da izvajanje vezja vodijo po poti protiprimerov. Teoretične raziskave so podkrepljene z eksperimentalnimi rezultati. Prikazana je tudi analiza časovne in prostorske zahtevnosti"}],"edm:type":"TEXT","dc:type":[{"@xml:lang":"sl","#text":"znanstveno časopisje"},{"@xml:lang":"en","#text":"journals"},{"@rdf:resource":"http://www.wikidata.org/entity/Q361785"}]},"ore:Aggregation":{"@rdf:about":"http://www.dlib.si/?URN=URN:NBN:SI:doc-DH1QX1KZ","edm:aggregatedCHO":{"@rdf:resource":"URN:NBN:SI:doc-DH1QX1KZ"},"edm:isShownBy":{"@rdf:resource":"http://www.dlib.si/stream/URN:NBN:SI:doc-DH1QX1KZ/24cf0b57-b26b-45d9-b447-096456f95242/PDF"},"edm:rights":{"@rdf:resource":"http://rightsstatements.org/vocab/InC/1.0/"},"edm:provider":"Slovenian National E-content Aggregator","edm:intermediateProvider":{"@xml:lang":"en","#text":"National and University Library of Slovenia"},"edm:dataProvider":{"@xml:lang":"sl","#text":"Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale"},"edm:object":{"@rdf:resource":"http://www.dlib.si/streamdb/URN:NBN:SI:doc-DH1QX1KZ/maxi/edm"},"edm:isShownAt":{"@rdf:resource":"http://www.dlib.si/details/URN:NBN:SI:doc-DH1QX1KZ"}}}}