<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:doc-DCXXYGEE</identifier><date>1985</date><creator>Colnarič, Matjaž</creator><creator>Rozman, Ivan</creator><creator>Stiglic, Bruno</creator><relation>documents/doc/D/URN_NBN_SI_doc-DCXXYGEE_001.pdf</relation><relation>documents/doc/D/URN_NBN_SI_doc-DCXXYGEE_001.txt</relation><format format_type="type">article</format><format format_type="extent">Str. 54-57</format><identifier identifier_type="ISSN">0350-5596</identifier><identifier identifier_type="COBISSID_HOST">4114454</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-DCXXYGEE</identifier><language>eng</language><publisher publisher_location="Ljubljana">Informatika</publisher><source>Informatica (Ljubljana)</source><rights>InC</rights><subject language_type_id="eng">bus linker</subject><subject language_type_id="eng">bus structure</subject><subject language_type_id="eng">multicomputer architecture</subject><subject language_type_id="slv">multiprocesiranje</subject><subject language_type_id="slv">simulacija multiprocesorskega računalnika</subject><subject language_type_id="slv">skupna vodila</subject><subject language_type_id="eng">VME bus</subject><subject language_type_id="slv">VME vodila</subject><subject language_type_id="slv">vodila</subject><title>Efficiency of multiple bus structure</title></Record>