<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:doc-9L1L58TC</identifier><date>2006</date><creator>Kač, Uroš</creator><relation>documents/doc/9/URN_NBN_SI_doc-9L1L58TC_001.pdf</relation><relation>documents/doc/9/URN_NBN_SI_doc-9L1L58TC_001.txt</relation><format format_type="issue">2</format><format format_type="volume">36</format><format format_type="type">article</format><format format_type="extent">str. 71-78</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">20235559</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-9L1L58TC</identifier><language>slv</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="slv">integrirana vezja</subject><subject language_type_id="slv">preizkušanje</subject><title>Design for test of mixed-signal integrated circuits</title><title>Načrtovanje preizkusljivosti mešanih analogno-digitalnih integriranih vezij</title></Record>