<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:doc-118KXWGX</identifier><date>2003</date><creator>Papa, Gregor</creator><relation>documents/doc/1/URN_NBN_SI_doc-118KXWGX_001.pdf</relation><relation>documents/doc/1/URN_NBN_SI_doc-118KXWGX_001.txt</relation><format format_type="issue">3</format><format format_type="volume">33</format><format format_type="type">article</format><format format_type="extent">str. 142-148</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">18109735</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-118KXWGX</identifier><language>eng</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="slv">evolucijski algoritmi</subject><subject language_type_id="slv">integrirana vezja</subject><subject language_type_id="slv">načrtovanje</subject><subject language_type_id="slv">razvrščanje</subject><title>An evolutionary approach to chip design: an empirical evaluation</title></Record>