<?xml version="1.0"?><rdf:RDF xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:edm="http://www.europeana.eu/schemas/edm/" xmlns:wgs84_pos="http://www.w3.org/2003/01/geo/wgs84_pos" xmlns:foaf="http://xmlns.com/foaf/0.1/" xmlns:rdaGr2="http://rdvocab.info/ElementsGr2" xmlns:oai="http://www.openarchives.org/OAI/2.0/" xmlns:owl="http://www.w3.org/2002/07/owl#" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:ore="http://www.openarchives.org/ore/terms/" xmlns:skos="http://www.w3.org/2004/02/skos/core#" xmlns:dcterms="http://purl.org/dc/terms/"><edm:WebResource rdf:about="http://www.dlib.si/stream/URN:NBN:SI:DOC-NR1FT6CA/5e44d163-75b4-4532-b23b-fee44c4a784c/PDF"><dcterms:extent>618 KB</dcterms:extent></edm:WebResource><edm:WebResource rdf:about="http://www.dlib.si/stream/URN:NBN:SI:DOC-NR1FT6CA/cd94fce4-3bf1-4e14-bd1c-328288f60541/TEXT"><dcterms:extent>0 KB</dcterms:extent></edm:WebResource><edm:TimeSpan rdf:about="2018-2022"><edm:begin xml:lang="en">2018</edm:begin><edm:end xml:lang="en">2022</edm:end></edm:TimeSpan><edm:ProvidedCHO rdf:about="URN:NBN:SI:DOC-NR1FT6CA"><dcterms:isPartOf rdf:resource="https://www.dlib.si/details/URN:NBN:SI:spr-ERWFHAKQ" /><dcterms:issued>2022</dcterms:issued><dc:creator>Bulić, Patricio</dc:creator><dc:creator>Lotrič, Uroš</dc:creator><dc:creator>Pilipović, Ratko</dc:creator><dc:format xml:lang="sl">Str. 24-27</dc:format><dc:identifier>COBISSID_HOST:122803203</dc:identifier><dc:identifier>ISSN:2591-0442</dc:identifier><dc:identifier>URN:URN:NBN:SI:doc-NR1FT6CA</dc:identifier><dc:language>en</dc:language><dc:publisher xml:lang="sl">Fakulteta za elektrotehniko</dc:publisher><dc:publisher xml:lang="sl">Slovenska sekcija IEEE</dc:publisher><dcterms:isPartOf xml:lang="sl">Zbornik mednarodne Elektrotehniške in računalniške konference</dcterms:isPartOf><dc:subject xml:lang="sl">FPGA</dc:subject><dc:subject xml:lang="sl">HDL</dc:subject><dc:subject xml:lang="sl">HLS</dc:subject><dc:subject xml:lang="sl">VLSI</dc:subject><dcterms:temporal rdf:resource="2018-2022" /><dc:title xml:lang="sl">On the employment of approximate multipliers in high-level synthesis toolkits|</dc:title><edm:type>TEXT</edm:type><dc:type xml:lang="sl">znanstveno časopisje</dc:type><dc:type xml:lang="en">journals</dc:type><dc:type rdf:resource="http://www.wikidata.org/entity/Q361785" /></edm:ProvidedCHO><ore:Aggregation rdf:about="http://www.dlib.si/?URN=URN:NBN:SI:DOC-NR1FT6CA"><edm:aggregatedCHO rdf:resource="URN:NBN:SI:DOC-NR1FT6CA" /><edm:isShownBy rdf:resource="http://www.dlib.si/stream/URN:NBN:SI:DOC-NR1FT6CA/5e44d163-75b4-4532-b23b-fee44c4a784c/PDF" /><edm:rights rdf:resource="http://rightsstatements.org/vocab/InC/1.0/" /><edm:provider>Slovenian National E-content Aggregator</edm:provider><edm:intermediateProvider xml:lang="en">National and University Library of Slovenia</edm:intermediateProvider><edm:dataProvider xml:lang="sl">Slovenska sekcija IEEE</edm:dataProvider><edm:object rdf:resource="http://www.dlib.si/streamdb/URN:NBN:SI:DOC-NR1FT6CA/maxi/edm" /><edm:isShownAt rdf:resource="http://www.dlib.si/details/URN:NBN:SI:DOC-NR1FT6CA" /></ore:Aggregation></rdf:RDF>