<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:DOC-LDISODPW</identifier><date>2012</date><creator>Trost, Andrej</creator><creator>Žemva, Andrej</creator><relation>documents/doc/L/URN_NBN_SI_doc-LDISODPW_001.htm</relation><relation>documents/doc/L/URN_NBN_SI_doc-LDISODPW_001.pdf</relation><relation>documents/doc/L/URN_NBN_SI_doc-LDISODPW_001.txt</relation><format format_type="issue">1/2</format><format format_type="volume">79</format><format format_type="type">article</format><format format_type="extent">str. 55-60</format><identifier identifier_type="ISSN">0013-5852</identifier><identifier identifier_type="ISSN">2232-3236</identifier><identifier identifier_type="COBISSID">266421248</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-LDISODPW</identifier><language>slv</language><publisher>Elektrotehniška zveza Slovenije</publisher><source>Elektrotehniški vestnik</source><rights>InC</rights><subject language_type_id="slv">digitalni sistemi</subject><subject language_type_id="slv">grafični krmilniki</subject><subject language_type_id="slv">mikroprocesorji</subject><subject language_type_id="slv">programljiva vezja</subject><title>Razvoj namenskih mikroprocesorjev za vezja FPGA</title></Record>