<?xml version="1.0"?><rdf:RDF xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:edm="http://www.europeana.eu/schemas/edm/" xmlns:wgs84_pos="http://www.w3.org/2003/01/geo/wgs84_pos" xmlns:foaf="http://xmlns.com/foaf/0.1/" xmlns:rdaGr2="http://rdvocab.info/ElementsGr2" xmlns:oai="http://www.openarchives.org/OAI/2.0/" xmlns:owl="http://www.w3.org/2002/07/owl#" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:ore="http://www.openarchives.org/ore/terms/" xmlns:skos="http://www.w3.org/2004/02/skos/core#" xmlns:dcterms="http://purl.org/dc/terms/"><edm:WebResource rdf:about="http://www.dlib.si/stream/URN:NBN:SI:DOC-L0G9FY09/9818d553-1a15-4b6a-94cc-7b247eb64260/PDF"><dcterms:extent>1596 KB</dcterms:extent></edm:WebResource><edm:WebResource rdf:about="http://www.dlib.si/stream/URN:NBN:SI:DOC-L0G9FY09/5392a652-2d73-492b-ae9b-3d01d632cec8/TEXT"><dcterms:extent>30 KB</dcterms:extent></edm:WebResource><edm:TimeSpan rdf:about="1985-2026"><edm:begin xml:lang="en">1985</edm:begin><edm:end xml:lang="en">2026</edm:end></edm:TimeSpan><edm:ProvidedCHO rdf:about="URN:NBN:SI:DOC-L0G9FY09"><dcterms:isPartOf rdf:resource="https://www.dlib.si/details/URN:NBN:SI:spr-Z2J12Z6C" /><dcterms:issued>2025</dcterms:issued><dc:creator>Babaeian Far, Morteza</dc:creator><dc:creator>Kaçar, Firat</dc:creator><dc:creator>Ormanci, Mehmet Aytug</dc:creator><dc:format xml:lang="sl">številka:1</dc:format><dc:format xml:lang="sl">letnik:55</dc:format><dc:format xml:lang="sl">str. 55-64</dc:format><dc:identifier>ISSN:0352-9045</dc:identifier><dc:identifier>DOI:10.33180/InfMIDEM2025.105</dc:identifier><dc:identifier>COBISSID_HOST:281427203</dc:identifier><dc:identifier>URN:URN:NBN:SI:doc-L0G9FY09</dc:identifier><dc:language>en</dc:language><dc:publisher xml:lang="sl">Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</dc:publisher><dcterms:isPartOf xml:lang="sl">Informacije MIDEM</dcterms:isPartOf><dc:subject xml:lang="en">32nm finfet technology</dc:subject><dc:subject xml:lang="sl">32nm FinFET tehnologija</dc:subject><dc:subject xml:lang="en">complementary folded-cascode amplifier</dc:subject><dc:subject xml:lang="en">double dynamic switching bias</dc:subject><dc:subject xml:lang="sl">dvojno dinamično preklapljanje polarizacije</dc:subject><dc:subject xml:lang="sl">komplementarni kaskodni ojačevalnik</dc:subject><dc:subject xml:lang="sl">preklopni kondenzator</dc:subject><dc:subject xml:lang="en">self-cascode</dc:subject><dc:subject xml:lang="en">switched capacitor</dc:subject><dcterms:temporal rdf:resource="1985-2026" /><dc:title xml:lang="sl">Design and optimization of multiple-channel double dynamic switching biased Op-Amp for switched capacitor integrator using FinFET technology| Načrtovanje in optimizacija večkanalnega dvojnega dinamičnega preklopnega optičnega ojačevalnika za stikalni kondenzatorski integrator z uporabo tehnologije FinFET|</dc:title><dc:description xml:lang="sl">This paper presents the design and optimization of a parametric multiple-channel Double Dynamic Switching Biased Complementary Folded-Cascode Amplifier with switched capacitor integrator application in 32nm FinFET technology. The LTspice simulations demonstrate that the amplifier can attain an open-loop DC gain of 44.8dB, and a phase margin of about 87.8° with ±0.5V supply voltages. Moreover, the amplifier power consumption is measured 246µW including bias circuitry and a Gain-Bandwidth Product (GBW) of 77.45MHz under a 5pF load capacitor. The circuit’s stability enables it to offer diverse design capabilities tailored to specific application needs. This novel design is capable of reducing supply voltages and power dissipation</dc:description><dc:description xml:lang="sl">Članek predstavlja načrtovanje in optimizacijo parametričnega večkanalnega ojačevalnika z dvojnim dinamičnim preklopom, ki se opira na komponente z zloženo kaskodo, z uporabo integratorja s preklopnim kondenzatorjem v 32 nm tehnologiji FinFET. Simulacije LTspice kažejo, da lahko ojačevalnik doseže ojačenje z odprto zanko DC 44,8 dB in fazno rezervo približno 87,8° pri napajalnih napetostih ±0,5 V. Poleg tega je izmerjena poraba energije ojačevalnika 246 µW, vključno z napajalnim vezjem in GBW 77,45 MHz pri obremenitvenem kondenzatorju 5pF. Stabilnost vezja omogoča diverzno načrtovanje s prilagoditvami glede na potrebe aplikacije. Ta nova zasnova lahko zmanjša napajalne napetosti in porabo</dc:description><edm:type>TEXT</edm:type><dc:type xml:lang="sl">znanstveno časopisje</dc:type><dc:type xml:lang="en">journals</dc:type><dc:type rdf:resource="http://www.wikidata.org/entity/Q361785" /></edm:ProvidedCHO><ore:Aggregation rdf:about="http://www.dlib.si/?URN=URN:NBN:SI:DOC-L0G9FY09"><edm:aggregatedCHO rdf:resource="URN:NBN:SI:DOC-L0G9FY09" /><edm:isShownBy rdf:resource="http://www.dlib.si/stream/URN:NBN:SI:DOC-L0G9FY09/9818d553-1a15-4b6a-94cc-7b247eb64260/PDF" /><edm:rights rdf:resource="http://creativecommons.org/licenses/by/4.0/" /><edm:provider>Slovenian National E-content Aggregator</edm:provider><edm:intermediateProvider xml:lang="en">National and University Library of Slovenia</edm:intermediateProvider><edm:dataProvider xml:lang="sl">Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</edm:dataProvider><edm:object rdf:resource="http://www.dlib.si/streamdb/URN:NBN:SI:DOC-L0G9FY09/maxi/edm" /><edm:isShownAt rdf:resource="http://www.dlib.si/details/URN:NBN:SI:DOC-L0G9FY09" /></ore:Aggregation></rdf:RDF>