<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:DOC-DTCE3G82</identifier><date>1997</date><creator>Zajc, Baldomir</creator><creator>Žemva, Andrej</creator><relation>documents/doc/D/URN_NBN_SI_doc-DTCE3G82_001.pdf</relation><relation>documents/doc/D/URN_NBN_SI_doc-DTCE3G82_001.txt</relation><format format_type="issue">2</format><format format_type="volume">27</format><format format_type="type">article</format><format format_type="extent">str. 112-119</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">726100</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-DTCE3G82</identifier><language>eng</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="slv">digitalna elektronika</subject><subject language_type_id="slv">elektronski elementi</subject><subject language_type_id="slv">optimiranje</subject><subject language_type_id="slv">vezja</subject><title>Logic perturbations: a basis for digital circuits optimization</title><title>Logične perturbacije: osnova za optimizacijo digitalnih vezij</title></Record>