<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:DOC-CZQTP4HZ</identifier><date>2009</date><creator>Bürmen, Arpad</creator><creator>Cijan, Gregor</creator><creator>Tomažič, Sašo</creator><creator>Tuma, Tadej</creator><relation>documents/doc/C/URN_NBN_SI_doc-CZQTP4HZ_001.pdf</relation><relation>documents/doc/C/URN_NBN_SI_doc-CZQTP4HZ_001.txt</relation><format format_type="issue">1</format><format format_type="volume">39</format><format format_type="type">article</format><format format_type="extent">str. 1-6</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">7247956</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-CZQTP4HZ</identifier><language>eng</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="slv">integrirana vezja</subject><subject language_type_id="slv">MOS tranzistorji</subject><subject language_type_id="slv">optimizacija</subject><subject language_type_id="slv">simulacije</subject><title>Fast MOS transistor mismatch optimization - a comparison between different approaches</title><title>Hitra optimizacija neujemanja MOS tranzistorjev - primerjava različnih pristopov</title></Record>