<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:DOC-8MVIYYQG</identifier><date>2011</date><creator>Benlatreche, M.S.</creator><creator>Rahmoune, F.</creator><creator>Toumiat, O.</creator><relation>documents/doc/8/URN_NBN_SI_doc-8MVIYYQG_001.pdf</relation><relation>documents/doc/8/URN_NBN_SI_doc-8MVIYYQG_001.txt</relation><format format_type="issue">3</format><format format_type="volume">41</format><format format_type="type">article</format><format format_type="extent">str. 168-170</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">263045888</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-8MVIYYQG</identifier><language>eng</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="slv">mejna plast</subject><subject language_type_id="slv">napetost</subject><subject language_type_id="slv">silicij</subject><subject language_type_id="slv">silicijev dioksid</subject><subject language_type_id="slv">tankoplastna tehnologija</subject><title>Experimental investigation of Si-SiO2 interface traps using equilibrium voltage step technique</title></Record>