A new low-power CMOS sample-and-hold circuit based on high-speed dynamic body biased switches

URN:NBN:SI:DOC-6PWUNJDP2017Hasan-Sagha, MohamadJalali, Mohsendocuments/doc/6/URN_NBN_SI_doc-6PWUNJDP_001.pdfdocuments/doc/6/URN_NBN_SI_doc-6PWUNJDP_001.txt447articlestr. 241-2460352-904512058196URN:NBN:SI:doc-6PWUNJDPengStrokovno društvo za mikroelektroniko, elektronske sestavne dele in materialeInformacije MIDEMInCbody biasingdual-edge samplingdvorobno vzorčenjehigh-speed switchessample and hold circuitsstikala velikih hitrostivzorčevalna vezjaA new low-power CMOS sample-and-hold circuit based on high-speed dynamic body biased switchesNovo vzorčevalno vezje nizke moči na osnovi hitrih dinamičnih stikal