{"?xml":{"@version":"1.0"},"edm:RDF":{"@xmlns:dc":"http://purl.org/dc/elements/1.1/","@xmlns:edm":"http://www.europeana.eu/schemas/edm/","@xmlns:wgs84_pos":"http://www.w3.org/2003/01/geo/wgs84_pos","@xmlns:foaf":"http://xmlns.com/foaf/0.1/","@xmlns:rdaGr2":"http://rdvocab.info/ElementsGr2","@xmlns:oai":"http://www.openarchives.org/OAI/2.0/","@xmlns:owl":"http://www.w3.org/2002/07/owl#","@xmlns:rdf":"http://www.w3.org/1999/02/22-rdf-syntax-ns#","@xmlns:ore":"http://www.openarchives.org/ore/terms/","@xmlns:skos":"http://www.w3.org/2004/02/skos/core#","@xmlns:dcterms":"http://purl.org/dc/terms/","edm:WebResource":[{"@rdf:about":"http://www.dlib.si/stream/URN:NBN:SI:DOC-6NVC8Q5S/3a13161e-2c63-47f8-a025-32fb75d8d60f/PDF","dcterms:extent":"694 KB"},{"@rdf:about":"http://www.dlib.si/stream/URN:NBN:SI:DOC-6NVC8Q5S/d4790832-859f-46d2-9a16-13478ec39fd3/TEXT","dcterms:extent":"32 KB"}],"edm:TimeSpan":{"@rdf:about":"1985-2025","edm:begin":{"@xml:lang":"en","#text":"1985"},"edm:end":{"@xml:lang":"en","#text":"2025"}},"edm:ProvidedCHO":{"@rdf:about":"URN:NBN:SI:DOC-6NVC8Q5S","dcterms:isPartOf":[{"@rdf:resource":"https://www.dlib.si/details/URN:NBN:SI:spr-Z2J12Z6C"},{"@xml:lang":"sl","#text":"Informacije MIDEM"}],"dcterms:issued":"2000","dc:creator":["Brezočnik, Zmago","Časar, Aleš","Kapus, Tatjana"],"dc:format":[{"@xml:lang":"sl","#text":"številka:3"},{"@xml:lang":"sl","#text":"letnik:30"},{"@xml:lang":"sl","#text":"str. 153-160"}],"dc:identifier":["ISSN:0352-9045","COBISSID:5935638","URN:URN:NBN:SI:doc-6NVC8Q5S"],"dc:language":"en","dc:publisher":{"@xml:lang":"sl","#text":"Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale"},"dc:subject":[{"@xml:lang":"sl","#text":"algoritmi"},{"@xml:lang":"sl","#text":"digitalna vezja"},{"@xml:lang":"sl","#text":"odločitveni grafi"},{"@xml:lang":"sl","#text":"preverjanje"},{"@xml:lang":"sl","#text":"verifikacija"}],"dcterms:temporal":{"@rdf:resource":"1985-2025"},"dc:title":{"@xml:lang":"sl","#text":"Formal verification of digital circuits using symbolic model checking| Formalna verifikacija digitalnih vezij s simboličnim preverjanjem modelov|"},"dc:description":[{"@xml:lang":"sl","#text":"This paper presents efficient algorithms for digital circuit verification. The algorithms are based on symbolic CTL (Computation Tree Logic) model checking. We also present an extension of ordinary CTL with fairness constraints. They enable verification of circuits with symbolic model checkingregarding only fair paths in the computaion tree. The model checking algorithms were implemented as part of a fully hime-made program package for manipulating finite machine descriptions of digital circuits, represented with Boolean functions. The package is also based on a fully home-made program package for manipulating Boolean functions, represented with binary decision diagrams"},{"@xml:lang":"sl","#text":"V članku predstavljamo učinkovite algoritme za verifikacijo digitalnih vezij. Algoritmi temeljijo na simboličnem oreverjanju modelov z logiko drevesa izvajanj (\"Computational Tree Logic\" - CTL). Prav tako predstavljamo razširitev navadnega CTL s poštenostnimi omejitvami, ki omogočajo verifikacijo vezij samo vzdolž poštenih poti v drevesu izvajanj. Algoritmi za preverjanje modelov so implementirani kot del povsem domačega programskega paketa za obdelavo opisov digitalnih vezij s končnimi avtomati, predstavljenihz logičnimi funkcijami, ki temelji na prav tako povsem domačem paketu za obdelavo logičnih funkcij, predstavljenih z binarnimi odločitvenimi grafi"}],"edm:type":"TEXT","dc:type":[{"@xml:lang":"sl","#text":"znanstveno časopisje"},{"@xml:lang":"en","#text":"journals"},{"@rdf:resource":"http://www.wikidata.org/entity/Q361785"}]},"ore:Aggregation":{"@rdf:about":"http://www.dlib.si/?URN=URN:NBN:SI:DOC-6NVC8Q5S","edm:aggregatedCHO":{"@rdf:resource":"URN:NBN:SI:DOC-6NVC8Q5S"},"edm:isShownBy":{"@rdf:resource":"http://www.dlib.si/stream/URN:NBN:SI:DOC-6NVC8Q5S/3a13161e-2c63-47f8-a025-32fb75d8d60f/PDF"},"edm:rights":{"@rdf:resource":"http://rightsstatements.org/vocab/InC/1.0/"},"edm:provider":"Slovenian National E-content Aggregator","edm:intermediateProvider":{"@xml:lang":"en","#text":"National and University Library of Slovenia"},"edm:dataProvider":{"@xml:lang":"sl","#text":"Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale"},"edm:object":{"@rdf:resource":"http://www.dlib.si/streamdb/URN:NBN:SI:DOC-6NVC8Q5S/maxi/edm"},"edm:isShownAt":{"@rdf:resource":"http://www.dlib.si/details/URN:NBN:SI:DOC-6NVC8Q5S"}}}}