Characterization of circuits in grid obtained by regular and semiregular tessellations

URN:NBN:SI:DOC-12BU3EK81989Stojmenović, IvanŽunić, Jovišadocuments/doc/1/URN_NBN_SI_doc-12BU3EK8_001.pdfdocuments/doc/1/URN_NBN_SI_doc-12BU3EK8_001.txt134articlestr. 48-510350-559617650690URN:NBN:SI:doc-12BU3EK8engSlovensko društvo InformatikaInformatica (Ljubljana)InCCharacterization of circuits in grid obtained by regular and semiregular tessellations