THE PRINCIPLE OF NEW SIGMA DELTA MODULATION TECHNIQUE BASED UPON THE USE OF A FLIP-FLOP
Martin Kollar\ Jan Šaliga^
^Department of Theory of Electrical Engineering and Measurement; ^Department of Electronics and Multimedia Communications Technical University Košice, Košice, Slovakia
Key words: sigma delta modulation, flip-flop, capacitive aoceleromefers
Abstract: This paper describes a new sigma delta modulation technique. This technique is used for measurement of changes in half capacitive bridge to detect deflections, which can result from acceleration input in practice. The half bridge is connected to a modified flip-flop circuit, the outputs of which are used for one-bit force feedback. The modification of flip-flop consists in the implementation of a switched capacitor structure to achieve a perfect flip-flop value symmetry and compensation of a flicker noise. Some theoretical considerations are verified by experimental results. An experimental circuit has been constructed from discrete elements.
Osnove nove sigma-delta tehnike modulacije na osnovi
uporabe flip-flopa
Kjučne besede: sigma-delta modulacija, flip-flop, kapacitivni merilniki pospeška
Izvleček: V prispevku opisujemo novo sigma-delta tehniko modulacije. Uporabljamo jo pri meritvi spremembe kapacitivnosti na mostičku namenjenemu zaznavanju odmikov pri pospeševanjih. Mostiček je priklopljen na flip-fiop vezje, katerega izhode uporabljamo za povratno vezavo na mostiček. Mostičku je dodana struktura stikalnega kondenzatorja, s pomočjo katerega dosežemo popolno simetrijo izhoda flip-flopa in kompenziramo šum. Nekatere teoretične predpostavke smo preverili s preiskusi. Preizkusno vezje smo izdeleli z diskretnimi elementi.
I. Introduction
A. Capacitive accelerometers
In a typical capacitive accelerometer, the proof mass is suspended above a substrate by compliant springs. Two nominaily equal-sized sense capacitors are formed between the electrically conductive proof mass and stationary electrodes /1/. When the substrate undergoes acceleration, the proof mass displaces from the nominal position, causing an imbalance in the capacitive half-bridge, shown in Fig.1a. This imbalance can be measured using
charge integration technique /1/. Other techniques can be found in reference /2/.
Force balancing of the proof mass is attained by enclosing the proof mass in a negative feedback loop. The feedback loop measures deviations of the proof mass from its nominal position and applies a force to keep the proof mass centered. The accelerometer output is taken as the force needed to null, or zero, the position, shown in Fig.1 b.
Taking into account only electronics of the system, the precision of measurement largely depends on position sense
Sense Position sense Comparator
element interface
Spring
Stationary Comb Fingers
X	
	F
F	
	V
^^X^Anchor
transducer
Figure 1a) Sense element, b) schematic of sigma- deita feedback ioop 28
interface. A great deal of contributions therefore focuses on elimination of errors of charge amplifier as a main part of the sense interface. Common-mode rejection ratio, flicker noise, dc offset of operational amplifier, and mismatches in reference capacitors are the main problems that must be solved. An excellent solution can be found, for example, in /1/. In this solution, the op-amp flicker noise and dc offset are measured and subtracted using correlated double sampling /1/. By using an input common-mode feedback/1/, the problems with common-mode rejection ratio and with mismatches in reference capacitors are solved. However, using this approach the system complexity rapidly increases.
Considering the above-mentioned discussion, this paper explores a new sigma-delta technique based upon the use of a flip-flop circuit. Properties of the flip-flop and some topics are therefore depicted in the following paragraph.
B. Utilization of the flip-flop circuits in sensor-based systems
First idea to use the flip-flop in sensor-based systems can be found in /3/. The circuit in Fig.1 as the sensor based on a flip-flop circuit has been introduced in this reference. In comparison to the standard flip-flop, the control impulses are not applied to the bases of the transistors but the circuit is repeatedly connected to a voltage source, shown in Fig.2. Note that flip-flop can be also controlled by a triangular or sine wave signal. The standard flip-flop consisting of two transistors and two resistors is characterized by two stable states, one and zero. In case of ideal value symmetry because of a noise it is not possible to decide that the stable state will be final. However, over a large number of cycles the ratio of ones to zeros will be one - 50 % state of the flip-flop/3/.
Ri
a=2VJT,

Figure 2. /4 flip-flop circuit with triangular control signal
As described in /4/, when Cs+>Cs- and other parameters are identical, the flip-flop takes the stable state 'one'. It means that a high potential Vh is applied across capacitor Cs+ while a low potential V| is applied across capacitor Cs-. Assume that standard capacitors of the flip-flop are replaced by sense capacitors according to Fig.3.
F=-F<
Figure 3. Schematic of capacitors Cs+,Cs-
An electrostatic force between parallel plates of capacitor Cs+ is given by
+ 2 3x h
(11
while between parallel plates of capacitor Cs+ it is a force given by
dx
The resultant force Ffs=F+-F- may be shown to be
fs 2 ax Jb
(2)
(3)
where
dCs _ dCs+ dCs-
2 2 2 and Vß = Vj^ -V^ . In case
dx dx dx that flip-flop holds the stable state 'zero' it is a force F=-Ffs, shown in Fig.3. Hence, controlling the flip-flop by a triangular signal, the force is applied between parallel plates of the sense capacitors to keep the proof mass m centered, which corresponds with the principle of a capacitive ac-celerometer.
To use the above mentioned principle, the perfect value symmetry of the flip-flop must be achieved. Note that manufacture inaccuracy of the resistors in the standard CMOS technology is at least 15 %. Primarily, the problem with mismatches in resistances of the flip-flop must be solved. A modification of the flip-flop is described in the following section.
II. Modified flip-flop circuit
A. Switched capacitor based flip-flop circuit
As it can be seen in Fig.4a, the standard resistors are replaced by switched capacitors. The switches are repeatedly turned on and off in the following order S3,S2,S1 and again S3. Corresponding control signals are shown in Fig.5. When control frequency fsw of the switched capacitor C is at least two orders higher than the frequency fc of the triangular impulse generator V, the circuit is equivalent to the scheme shown in Fig.4b. To the point 1 as
well as to the point 2 an equivalent resistance Reqv is connected.
tionary model and usage of time domain analysis is needed to analyse the influence of flicker noise.


C.
T, T,
V (AA

a)
Figure 4a) Flip-flop with the switched capacitor,b) equivalent circuit diagram
V>
GND
ß!
V,
cc
Vfl,
Figure 6. CMOS switch
As shown in /5/, the root mean square (RMS) of noise voltage VfN relating to the control circuit is given by
/\
Vc3
Vc2
Vol
->



isw
t
Figure 5.
Equivalent resistance Reqv is given by well-known formula
Control signals vc 1, vc2, and vc3 of the switches S1,S2, and S3
R = —
''' Cfs,
(4)
The approach shown in Fig.4a has several important advantages, including its non-sensitivity to changes of the capacitor C and the control frequency fsw. The circuit is also realizable using CMOS technology. On the other hand, switch charge injection as a new influence must be taken into account. Switch charge injection and a noise within the flip-flop are analysed in the following paragraphs.
B. Analysis of a flicker noise
Flicker noise in the flip-flop is mainly due to switches S1,S2,S3. Flicker noise due to unipolar transistors T1,T2 can be omitted because these transistors are turned off in the moment of turnover Fig.6 shows a CMOS switch. Since the switches are repeatedly turned on and off, a non-sta-

AC
t'i

s, -s-

(5)
00 X,
where Cox is the gate oxide capacitance, A is the channel area, q is the elementary charge, Xh is the fastest transition rate, and Xl is the slowest transition rate of the carriers, g represents the distribution of X, Cx is an autocovar-iance in the time domain /5/ and tr is the time during which the switch is turned on. Typical values for 0.8|j,m CMOS process are as follows: Xh =10"'°s \	^ ,Cox =0.8
fFjim'^, kF=10"^^, A=1 By numerical solving of (5), fortr=0.1 jis, we getVfN=1.2 |j.V. Because of such asmall noise voltage, the influence of the flicker noise can be neglected.
C. Analysis of kT/C and shot noise
Because both kT/C and shot noise are high frequency, they are analysed in this paragraph together. To quantify the effects of the noise on the value symmetry of the flip-flop, it is useful to refer all noise sources to the points 1,2, shown in Fig.4b.
As it is described in paragraph IIa, the switches of the flip-flop are repeatedly turned on in the following order S3,S2,Si, and again S3. When it holds that Cs+,Cs»Csw, where Csw is an output capacitance of the switch, kT/C noise is largely due to sense capacitors Cs+,Cs- . Therefore, RMS of the noise relating to the points 1,2 (see Fig.4a)
is given by = .^IkT C^ . where k is the Boltzman constant, T is the thermodynamic temperature, and Cs=(Cs++Cs-)/2.
Shot noise is due to switches Si,S2. Shot noise due to switch S3 can be omitted, because the noise of this source is equally distributed to the right and left side of the flip-flop. As shown in /5/, RMS of the shot noise of the switch, which is repeatedly turned on and off, leads to
where Vm is maximal voltage
across the switch and q is the elementary charge. By means of Duhamel's integral it can be shown that vi
and V2


(6)
(7)
where function at describes the triangular control signal of the flip-flop (see Fig. 2). Therefore, the maximal voltage across the switch Si is aReqvCs+ and across the switch S2 it is a value aReqvCs- In case of our circuit, shot noise due
totheswitchesSi,S2isgivenby''^,s/,^^ .Thus,
4C
sw
the resultant high frequency noise between the points 1,2 of the flip-flop is given by
y ^	Q , kT
4C
str
a
(8)
III. Experimental results
A. Verification of the flip-flop functionality
An experimental circuit was constructed from discrete elements. The switches were realized by means of an integrated circuit 74HCT4066, and the transistors Ti.Ta in N3515 differential pair were used. Primarily, the existence of two stable states had to be verified. The flip-flop was controlled by triangular impulses with the parameters as follows: a=0.85	Tc=340 |j,s, and other parame-
ters were tr=0.1 |j.s, Tsw=0.4 [as, Csw=3.5 pF, and Cs+ ,Cs-about 28 pF.
vr-^
Figure 7, Courses of voltages vi, v2
Fig.7 shows oscilloscope courses of the voltages vi,v2. During the experiment the flip-flop according to Fig.4a took the stable state one or zero. It is sufficient evidence of the existence of only two stable states.
B. Influence of a noise
Using (4), (8) and parameter values shown in the previous paragraph it follows that RMS of the total high frequency noise should be about 20 (iV.
Fig.Sa) shows the change of voltage vi which is caused by a charge injection of the switch Si. When the switch Si is turned on, the switch S2 is turned off and therefore switch charge injection can break the value symmetry of the flip-flop. However, afrequency jitter of the triangular signal must be taken into account in relation to the control frequency fsw of the switches. From this point of view the influence of switch charge injection relating to the points 1,2 (see Fig.4b) is only an additive noise. The resultant probability of distribution is then shown in Fig.8b. As it can be seen, expected RMS of the total noise Vnois is 260 |aV. Experiments have been carried out to verify this value. The measurement set up is shown in Fig.9a. The impulses from flip-flop outputs were processed, through additive invertors T3,R; T4,R, in a personal computer (PC). The measurement procedure first involves the adjustment of the offset compensation voltage Vot until 50 % state of the flip-flop is obtained, as shown in Fig.9b. This voltage is then again
Figure 8a) Charge injection, b) resultant probability of distribution
R
r,
Vi

IFtliHIii
one
Figure 9a) Measurement set up, b) 50 % state of the flip-flop
tuned until 84 % is obtained. The difference in the two offset voltages is then the Rf\/!S of the noise. "Eighty-four percent" is used because this is the probability of obtaining a 'one' when the shift in the distribution equals Vnois-According to the theoretical conclusion, Vnois is 260 |J,V, whereas the measured Vnois was 290 )i,V.
It is useful to know the measured capacitive error caused by the noise. Since Vof is defined as a difference between V2 and vi, by means of (6) and (7) we get Vof=aReqv{Cs+-Cs-). According to the parameters of our circuit it follows that Vof/(Cs+-Cs-) =1 mV/pF. Therefore, the noise causes the capacitive error 290 fF.
In another experiment, soma extra capacitors were added to the capacitor Cs+. Predicted and measured values of the offset voltage Vof are shown in Tab.1.
Table 1. Predicted and measured values of Vof in the dependence on an additive capacitance
Additive capacitance	Measured voltage	Predicted voltage
[PF]	[mV]	[mV]
5.5	5,7	5.5
11.9	11,7	11.9
n.i	13	12.7
IV. Conclusions
A new capacitive sigma-delta modulation technique has been presented. This technique consists in usage of a switched capacitor based flip-flop. Equivalent circuit is then characterized by perfect matched load resistances. Another main advantages in comparison to the ordinary approaches are as follows: negligible flicker noise (only a few l-iV), simplicity (charge amplifier, comparator and another
compensating circuits are not needed), high capacitive sensitivity (in relation to an offset voltage it is 1 mV/pF). The capacitive sensitivity may be at need regulated by a control frequency of the switches. A disadvantage is relatively high charge injection of the switches. However, tested circuit was made only from discrete elements. By realization on a chip the substantial enhancement can be expected.
Acknowledgement
The work presented in this paper was supported by a grant from the fvlinistry of Education and Academy of Sciences of Slovak Republic (VEGA), under Grants No.1/9030/ 2002,1/0376/2003.
This work has been published in the Proceedings of the 13th International Symposium on Measurement for Research and Industry Applications and the 9th Workshop on ADC Modelling and Testing, Athens, Greece,
IMEKO holds the copyright on the article, however authors have permission to publish the papers elsewhere if properly reference to the original proceedings is made (in the article it is reference /7/).
References
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/2/ Valenzuela, A.G., Azar, M.T.: "Comparative study of piezoelectric, piezoresistive, electrostatic, magnetic, and optical sensors", Proc. SPIE, vol. 2291, pp. 125-142, 1994.
/3/ Lian, W., Middelhioek, S.: "A new class of integrated sensors with digital output based upon the use of a flip-flop", IEEE Electron Device Letters, vol, EDL-7, pp.238-240, 1986,
/4/ Kollär. M.: "Formula for the calculation of the equivalent voltage of the flip-flop sensor", www. Electronic Letters.com, vol, 2, 2002. Available to: www.electronicsletters.com /5/ Tian.H., Gamal,A.L: Analysis of noise in CMOS APS. Available to:
http://wviAfi/-isl.stanford.edu/~abbas/group/papers_and_pub/ 1_f_noise.pdf
/6/ Michaeli, L.: Modelling of analog-to-digital interfaces, Technical
University Košice, p.164, 2001. /7/ Kollär,M., Šaliga, J.: The principle of new sigma-delta modulation technique based upon the use of a flip-flop In: Proceedings of the 13th International Symposium on Measurement for Research and Industry Applications and the 9th Workshop on ADC Modelling and Testing, Athens, Greece, 2004, vol.1, pp. 224-229, ISBN 960-254-644-1.
Martin Kollär
Department of Theory of Electrical Engineering and
Measurement;
Jan Šaliga
Department of Electronics and Multimedia Communications Technical University Košice, Park Komenskeho 3, 041 20 Košice, Slovakia Tel: +421-55-6022579; Fax: +421-55-6323989;
E-mail: Martin.Kollar@tuke.sk
Prispelo (Arrived): 03.11.2004 Sprejeto (Accepted): 15.03.2005