Original scientific paper
Informacije
Journal of Microelectronics, Electronic Components and Materials Vol. 45, No. 3 (2015), 175 - 179
Voltage-mode analog PID controller using a single z-copy current follower transconductance amplifier (ZC-CFTA)
Worapong Tangsrirat
Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang (KMITL), Ladkrabang, Bangkok, Thailand
Abstract: This paper endeavours to design a proportional-integral-derivative (PID) controller based on the use of single z-copy current follower transconductance amplifier (ZC-CFTA). The developed PID controller consists of one ZC-CFTA, two truly grounded passive components and virtually grounded passive components. It does not require any passive component matching, and the realized controller parameters are adjustable electronically. The effects of parasitic elements and tracking errors of the ZC-CFTA are also investigated. Simulation results in PSPICE demonstrate the workability of the proposed PID controller.
Keywords: z-copy current follower transconductance amplifier (ZC-CFTA); proportional-integral-derivative (PID); analog controller; voltage-mode circuit
Analogni PID krmilnik v napetostnem režimu realiziran z enim dvo-izhodnim tokovnim sledilnikom, povezanim s transkonduktančnim ojačevalnikom (ZC-CFTA)
Izvleček: V tem članku si prizadevamo zasnovati proporcionalno-integralno-diferencialni (PID) krmilnik na osnovi enega samega dvo-izhodnega tokovnega sledilnika, povezanega s transkonduktančnim ojačevalnikom (ZC-CFTA). Razviti PID krmilnik je sestavljen iz enega ZC-CFTA, dveh zares ozemljenih pasivnih komponent in dveh navidezno ozemljenih pasivnih komponent. Parametri realiziranega krmilnika so elektronsko nastavljivi in ujemanje pasivnih komponent ni potrebno. Raziskani so tudi efekti parazitnih elementov in napake sledenja ZC-CFTA. Rezultati simulacij v PSPICE-u pokažejo izvedljivost predlaganega PID krmilnika.
Ključne besede: dvo-izhodni tokovni sledilnik, povezan s transkonduktančnim ojačevalnikom (ZC-CFTA); proporcionalni-integralni-diferencialni (PID) krmilnik; analogni krmilnik; vezje v napetostnem režimu
* Corresponding Author's e-mail: rworapong@gmail.com
1 Introduction
The ubiquitous proportional-integral-derivative (PID)	on different high-performance active elements, such
controllers are the most widely-used controllers in	as operational transconductance amplifiers (OTAs) [3],
process industries, and gained widespread industrial	current differencing buffered amplifiers (CDBAs) [4],
acceptance for many decades [1]. This is owing to the	current-controlled current conveyors (CCCIIs) [5], sec-
attribute that they offer many good features, such as	ond-generation current conveyors (CCIIs) [6]-[8], and
simplicity of design, low cost, robustness and wide ap-	current feedback operational amplifiers (CFOAs) [9]. In
plicability, as well as easy tunability of their parameters	[3]-[5], the signal flow graph synthesis procedures for
[2]. The enormous literature on PID process controllers	realizing analog PID controllers were presented. In ac-
includes a wide variety of design approaches based	tive circuit realizations, they contain too many active
175
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W. Tangsrirat; Informacije Midem, Vol. 45, No. 3 (2015), 175 - 179
and passive components. The CCII can also be applied to construct PID process controllers, as demonstrated in [6]-[8]. However, at least two CCIIs and five passive components are required for these realizations. The work in [9] proposed a PID controller using a single CFOA. Although the circuit employs only one active component, it does not exhibit the feature of electronic tuning, and the passive components used in its construction are floating.
In 2008, the conception of the z-copy current follower transconductance amplifier (ZC-CFTA) has been introduced [10]. This device is a modified version of the conventional current differencing transconductance amplifier (CDTA) [11] by replacing the current differencing unit with a current follower and complementing the circuit with a simple current mirror for copying the z-terminal current. Therefore, the ZC-CFTA element is a cascade connection of the dual-output current follower and the operational transconductance amplifier. As a result, the capability of applications based on ZC-CFTAs is extended [12]-[14].
Our purpose in this study is to present an alternative circuit configuration for realizing an analog voltage-mode PID controller based on the use of the ZC-CFTA as an active element. The configuration uses only one ZC-CFTA, cooperating with four grounded passive elements, i.e. two truly grounded passive components and two virtually grounded passive components. The circuit also does not need passive element matching. Three realized parameters of the presented PID controller can be tuned to the desired valued by the transconductance (gm) of the ZC-CFTA. In addition, the ZC-CFTA non-ideality effects including finite parasitic elements and transfer errors on the controller behavior are examined in detail. Also, PSPICE simulations are performed to demonstrate the performance of the presented controller circuit, and to verify the theoretical expectations.
2 ZC-CFTA Principle and Realization
The ZC-CFTA is a versatile active circuit building block, which is made by the cascade connection of two essential circuit blocks, i.e. a dual-output current follower at the front end, and an operational transconductance amplifier at the rear end. Fig.1 shows the electrical symbol and equivalent circuit of the ZC-CFTA. As shown in Fig.1, this device consists of a low-input-impedance current terminal (f) and three high-output-impedance current terminals (z, zc and x). The characteristic of an ideal ZC-CFTA can be represented by the following expression [12]-[14] :
(a)
ZC-CFTA

f	f	x	ix ^
			
	z	zc	
i'i I
vz vzc
-<3 Vx
(b)
f
VfO-

f
-o Vx
-oVz,
-O Vz
Figure 1: The ZC-CFTA.
(a) circuit symbol, (b) equivalent circuit.
i = i = i. and i = g v
zc z f	x m z
(1)
where gm denotes the small-signal transconductance gain of the ZC-CFTA. In general, the value of gm depends on the external supplied current.
The possible BiCMOS implementation of the ZC-CFTA used in this work is illustrated in Fig.2. Transistors Q1-Q7 act as a dual-output current follower that follows an input signal current (f) to output currents flowing through terminals z and zc (iz and izc). Group of transistors Q8-Q14 functions as an operational transconductance amplifier, which converts the impressed voltage at terminal z into the signal current at terminal x (ix) by the transconductance gm. From small-signal circuit analysis of this structure, the transconductance value gm depends on an external biasing current l0, and can be expressed as [14] :
gm
_ Io
2Vt
(2)
+v


Qsdir
f
s
Q JhH^Q :
0

© q)i- d> ©
Figure 2: BiCMOS realization of the ZC-CFTA.
zc
x
zc
z
Q
I
Q
;
-v
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W. Tangsrirat; Informacije Midem, Vol. 45, No. 3 (2015), 175 - 179
In addition, VT is the usual thermal voltage, approximately 26mV at 27°C.
3 Proposed PID Controller Realization
The circuit implementation of the PID controller based on the use of the ZC-CFTA as an active component is shown in Fig.3. As can be seen, the proposed controller comprises one ZC-CFTA, two virtually grounded passive components (R, and C,), and two truly grounded passive components (R2 and C2). These grounded passive elements can compensate for the parasitic impedances at their corresponding nodes. The circuit analysis of the proposed PID controller circuit in Fig.3 yields the following voltage transfer function :
C, C and g . It is further to be noted that the g -value can be used as a tool to tune the controller parameters for compensating the deviation from the ZC-CFTA non-ideality or the errors in passive component values.
4 Non-ideal Performance Analyses
4.1 Tracking Error Effects
In non-ideal case, the current transfer from terminal f to terminals z and zc, as well as, the current at terminal x may differ from ideal values due to the current tracking error, and transconductance inaccuracy. Considering these errors, the terminal relationships of the non-ideal ZC-CFTA can be rewritten by :
KJsl
Vn (s)
fRL + gmR1C1 A R C
2
+
gmR2
SRC2
+ sR2Cx (3)
In general, the voltage transfer function of an analog PID controller can be expressed as [15] :
V (s)	1
^ou^l = K + _L + sTd
Vin (s) p sTi d
(4)
where Kp is the proportional gain, T is the integral time constant and Td is the derivative time constant. Therefore, by comparing eq.(3) with eq.(4), the three parameters of the realized PID controller in Fig.3 are found out to be :
Kp = R2
+ SmCl A
R

T = R1C2
' gmR2
And
Td - R2C1
(5a)
(5b)
(5c)
From eq.(5), the above three coefficients can be adjusted by appropriately setting the values of R1, R2,
Ri
Cl
	ZC-CFTA f x z zc			
				
				
1C ^ C2				lR2
-o Vout
i = i = a i, and
zc z	f
i = ña v
x "-/m z
(6)
where a is the current tracking error, and b is the transconductance inaccuracy parameter. By repeating the analysis of the proposed PID controller circuit in Fig.3 and taking into account the parameters a and b of the ZC-CFTA, the controller parameters Kp, T. and Td can be obtained as :
Kp =aR2
P	2

T =-
V
R1C2
R

' aߧmR2
And
Td =aR2C1
(7a)
(7b)
(7c)
As can be seen from eq.(7), the values of all PID controller parameters are slightly altered by the influences of the ZC-CFTA current tracking error and transconductance inaccuracy. To compensate for these small deviations, the gm-parameter can be tuned by means of the ZC-CFTA bias current (IO). On the other hand, if the controlled-gain current follower transconductance amplifier introduced in [16] is employed instead of the ZC-CFTA in Fig.3, the parameters a and b can be tuned by the controllable transfer gains to obtain the desired Kp, T and Td values, or to compensate for the small errors that occur in their values. The inspection of eq.(7) indicates that the relative sensitivities of the three controller parameters with respect to the active and passive component values are found within unity in magnitude. In consequence, this controller circuit possesses low sensitivity performance.
Figure 3: Proposed PID controller realization.
V
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W. Tangsrirat; Informacije Midem, Vol. 45, No. 3 (2015), 175 - 179
4.2 Parasitic Element Effects
The practical model of the ZC-CFTA including essential parasitic elements is shown in Fig.4. As it is shown, the f-terminal exhibits the low-value serial parasitic resistance Rf and the z, zc and x-terminals exhibit large parasitic resistances R_, Rzc, and Rx in parallel with low-value parasitic capacitances C, Czc and C, respectively. When the circuit in Fig.3 is re-considered by taking the mentioned parasitic elements into account, the following assumptions can be made.
(a) Since the z-terminal is terminated by the external capacitor C2, an extra parasitic pole w1 is introduced by Rz and C2 (assuming C2 >> C) at low frequencies, namely @ 1/RzC2. For close to ideal operation at low frequencies, the operating frequency should be selected 10 times higher than wr Thus, the low-frequency range of the proposed controller can be approximated as :
a> 10«, =aL
(8)
(b) The external grounded resistor R2 is connected in parallel with the parasitic impedances (Rzc//Czc) and (RJ/C) of terminals zc and x. The extra pole w2, which is approximately equal to w2 = 1/(R2//Rzc//Rx) (Czc//Cx), appears only the high-frequency region of characteristic. Usually R2 << Rzc//Rx, the pole w2 is located at about w @ 1/R,(C //C). Thus, to obtain ideal
2	2 v zc x	'
response, the maximum operating frequency of the controller should be chosen as :

(9)
(c) In conclusion, combining eqs.(8) and (9), the useful frequency range of the proposed PID controller circuit in Fig.3 can be defined simply as :

(10)
Ideal ZC-CFTA
Rf -AAÁH
f'	x'
	
z	zc'
Rx
Rz
i||—V^V—i'
Hh'
cz
tz tzc -1	' n
Rzc .
'1—Wv—||i
--HIM»
C
zc
-o x
z zc
Figure 4: Non-ideal ZC-CFTA model including essential parasitic elements.
5 Simulation and Comparison of the Results
The performance of the proposed PID controller circuit in Fig.3 has been evaluated by means of PSPICE simulation. In simulations, the ZC-CFTA structure given in Fig.2 was characterized by 0.35-|mm real BiCMOS process parameters. Transistor aspect ratios (W/L in |mm/|im) were 7/0.35 and 14/0.35 for all the NMOS and PMOS transistors respectively. The circuit was biased with the following conditions: ±V = 1 V and IB = 50 |A
For our design example, the following active and passive component values were chosen: gm = 1 mA/V (IO = 52 ^A), R1 = R2 = 1 kW and C1 = C2 = 1 nF. In this setting, the corresponding controller parameters were obtained as: Kp = 2, T = 10-6 s and Td = 10-6 s. The total power consumption of the proposed controller is measured as approximately 23.7 mW. Fig.5 shows the ideal and the simulated frequency responses of the proposed PID controller circuit in Fig.3. As can be seen from the results, the ideal values and the simulation results are in agreement between 150 Hz and 1 MHz. It should be noted that the differences between the two responses in low- and high-frequency regions can be attributed to two extra parasitic poles w1 and w2, respectively.
Figure 5: Ideal and simulated frequency responses of the proposed PID controller configuration of Figure 3.
To illustrate the time-domain characteristic of the proposed PID controller circuit, a 50-mV step signal voltage with 100-ns rise time is applied to the input of the circuit. Both ideal and simulated output voltage responses vout are shown in Fig.6. From this result, an overall proportional action of the controller is obvious in the 0-100 ns period. At 100 ns, the sudden decrease in the controller output is due to the derivative action, since the input signal of the controller changes at a faster rate. After 100 ns, the action of the integral control mode is introduced. The controller output increases almost linearly since there is no change in the input for this period of time. As previously mentioned, the discrepancy between the ideal and the simulated results can be attributed to the parasitic impedances
75
^ 50
25
1U
Ik
100k
1M
100M
x
C
x
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W. Tangsrirat; Informacije Midem, Vol. 45, No. 3 (2015), 175 - 179
r
													......							
													- -		Ideal response Simulated respor					
/	y																		se	
																				
/																				
/																				
																				
		\										_						—	—	
																				
Time (^s)
Figure 6: Step responses of the proposed PID controller configuration of Fig.3.
of the ZC-CFTA, most notably the finite port resistances R, R and R.
z zc	x
6 Conclusions
In this paper, a simplified structure of the PID controller with single ZC-CFTA is introduced. The introduced PID controller has been realized using a minimum number of passive components, without requiring a passive component-matching constraint. The controller gains are adjustable by tuning the gm-value of the ZC-CFTA. The effects caused by the parasitic elements and the transfer errors of the ZC-CFTA are also discussed. Simulation results confirm the theoretical analysis.
7. Acknowledgements
This work was supported by the Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang (KMITL). The authors are also thankful to the reviewers for their valuable comments and helpful suggestions, which substantially improved the quality of the manuscript.
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Arrived: 24. 09. 2014 Accepted: 02. 08. 2015
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