GAIN CONTROL LOOP FOR A 2.4 GHZ VARIABLE GAIN LOW NOISE AMPLIFIER (VGLNA) Lini Lee, Roslina Mohd Sidek, Sudhanshu Shekhar Jamuar and *Sabira Khatun Department of Electrical and Electronic Engineering, *Department of Computer System and Communication Engineering, Faculty of Engineering, University Putra Malaysia (UPM), Selangor, Malaysia. Key words: continuous gain variation, higli gain, linearity, iow NF, radio frequency, variabie-gain LNA Abstract: The most critical point of a integrated receiver is the radio frequency (RF) input and the first stage of the receiver is a low noise amplifier (LNA). Thus, LNAs with low power consumption and excellent properties in terms of gain, noise and linearity are highly in demand. Moreover, a variable-gain LNA which can prevent saturation in the receiver when the input signal becomes relatively large has the advantage of no additional attenuator or variable gain amplifier is required. Thus, power consumption, chip size and cost can be minimized at the same time. Hence, this work proposes a two-stage variable gain LNA with large and continuous gain variation. By introducing a simple gain-control loop at the second stage of a cascade LNA, a continuous gain tuning range of approximately 14 dB is achieved. The VGLNA is designed using 0.18 |.im CMOS technology and targeted for applications at 2.4 GHz. The maximum gain and NF of this VGLNA are 23 dB and 1.12 dB respectively The DC power consumption is reported to be 12.4 mWfroma 1 V power supply. Comparison is made with available circuits to show that this VGLNA has the advantage of a continuous tuning range and low NF, and this is accomplished without degrading its performance. Kontrolna zanka ojačanja za 2.4GHz nizkošumni ojačevalnik s spremenljivim ojačanjem (VGLNA) Kjučne besede: spreminjanje ojačanja, visoko ojačanje, linearnost, nizko šumno število, radijske frekvence, ojačevalniki s spremenljivim ojačanjem Izvleček: Najbolj občutljiva točka integriranega sprejemnika je RF vhod z nizkošumnim ojačevalnikom (LNA). Zatorej je povpraševanje po LNA ojačevalnikih z nizko porabo ter drugimi odličnimi lastnostmi, kot so ojačanje, nizek šum in linearnost, veliko. Prednost imajo predvsem LNA ojačevalniki s spremenljivim ojačanjem, ki ne gredo v zasičenje, ko zunanji signal postane relativno močan. Zatorej lahko porabo, velikost čipa in ceno hkrati zmanjšamo.V prispevku opišemo dvostopenjski LNA ojačevalnik z velikim in nepretrganim ojačanjem. Z uvedbo kontrolne zanke ojačanja v drugo stopnjo stopničastega LNA dosežemo nastavljivo nepretrgano ojačanje v območju 14dB. Tak VGLNA je načrtan v 0.18(,im CMOS tehnologiji s ciljno uporabo na frekvenci 2.4GHz. Največje ojačenje in šumno število sta 23dB in 1.12dB. DC poraba je 12.4mWpri napajalni napetosti IV. Primerjava s podobnimi vezji pokaže prednosti tako načrtanega VGLNA. 1. Introduction The ceaseless advance of Complementary Metal-Oxide Semiconductor (CMOS) teclinology such as the shrink of the gate length and the improvement of the cutoff frequency makes CMOS more and more attractive for many radio frequency (RF) circuits in the several GHz range /1-3/. There is no doubt that a complicated RF system can be realized in CMOS and some chips have been fabricated and reported /4-7/. The first block of wireless receiver following the antenna is a low noise amplifier (LNA) which plays a significant role as its noise figure (NF) sets a lower bound on the NF of the entire system. Moreover it should be able to accommodate large signals without distortion and must match the input impedance. A good input impedance match is more critical if a pre-select filter precedes the LNA since the transfer characteristics of many filters are sensitive to the quality of the termination. The additional requirement is the low power consumption which plays an important role in the applications of portable communications systems /8/. It is not a simple task to design a LNA with high gain and low NF by considering both linearity and input impedance match, with low power consumption. Inductive degeneration is adopted as the LNA architecture popularly because it does not introduce extra noise source and it uses a source degenerative inductor to realize input impedance match. The theoretical analysis and calculation of NF of this topology has been done using an extended MOS noise model /8/. If the gain of LNA block is too low, noise level of this block might dominates the overall NF and if it is too high, the input signal would create nonlinearity. Inversely, if the gain is too low, the mixer noise dominates the overall NF and if it is too high, the input signal to the mixer creates large intermodulation products. For these reasons, the design of the LNA with a variable gain stage or termed as variable gain low noise amplifier (VGLNA) is adopted not only to achieve high gain and low noise but also high linearity. The function of the controllable gain is to prevent sat- uration in tine receiver when the input signal becomes relatively large. Conventional design techniques for VGLNA can be seen in using bypass switch /9/, which achieves gain variation by on-off control of the bypass switch. However, continuous gain control is difficult with this method. Thus unnecessary power would be consumed at low gain mode. Other gain variation methods reported is the current variation according to target gain /10-12/. These methods reduce its power consumption at low gain mode by controlling its biased current of a LNA. However, this method suffers from small gain variation or discontinuous gain control. This paper focuses on the CMOS VGLNA designed for 2.4 GHz with a gain-control loop. The VGLNA can operate from 2.1 GHz to 2.5 GHz and can be used for Wideband Code Division Multiple Access (WCDMA) and IEEE 802.11 b/g Wireless Local Area Network (WLAN) applications. By introducing a simple gain control loop composed of a gain control transistor and a capacitor, a continuous gain tuning range of approximately 14 dB is achieved. 2. Variable gain block of a LNA Fig. 1 shows the fundamental architecture of proposed gain control LNA. The gain control loop is composed of a gain control transistor (Mgc) and a capacitor Cf. If the Mgc is turned off, the gain control loop is like an open circuit and the VGLNA operates with minimum gain. On the other hand, if Mgc is turned on with sufficiently high voltage (like Vdd), then Mgc operates as a bypass switch and it operates at maximum gain. Therefore, a large gain variation range similar to that of the bypass switch method is achieved. vdci fj iLout ci lg frigc V h- -It- -|-FfFöul;. t VT Fig. 1. Fundamental architecture of proposed variable gain LNA. The control voltage of the Mgc is between threshold voltage and Vdd with Mgc operating as a variable resistor. This resistance value is equal to the channel resistance Rgc which can be expressed as where Vc and Vth-gc are the control or gate voltage and threshold voltage of Mgc respectively. Vgs4 is the gate-to-source voltage of M4. From (1), Rgc varies inversely proportional to the variation of Vc-. As Vc increases, the impedance of the gain control loop becomes smaller, thus the inter-stage matching changes. Therefore, the gain of the second stage increases continuously as Vc increases. This is verified in the simulation results in Section 4. The capacitor Cf is added to support the operation of Mgc as a variable resistor. It operates as a DC blocking capacitor, making sure that the Vds of Mgc stays small. With the Vds stays small, the Mgc operates as a variable resistor. 3. Design of a Variable Gain LNA Based on the variable gain block described in Section 2, a 2.4 GHz VGLNA is designed. The VGLNA is composed of a cascode stage and variable gain block. Fig. 2 shows the cascode stage of the designed VGLNA. The cascode stage is made of transistors M1 and M2. On-chip inductors of Lg and U are used respectively for matching the input stage of the cascode stage and as a degeneration inductor to suppress the NF of the VGLNA. Fig. 3 shows the schematic of the variable gain block in a VGLNA. The gain control characteristics of designed variable gain block depends on the size of Mgc. Large size of Mgc gives large gain variation. However, too large of gain variation would changes too rapidly making continuous control difficult. Moreover, large size of Mgc increases parasitic capacitance and may reduce the maximum gain. On the other hand, if the size of the Mgc is very small, the gain variation would become small. This result might not satisfy the linearity requirement of the following stage in a receiver such as a mixer. Therefore, the size of the Mgc must be selected within the proper gain variation range. Vdd f;jFQÜt,'> W / \ (i; Fig. 2. The cascode stage of the designed VGLNA. ? m— >ri) ffPxit) Fig. 3. The variable gain block in the proposed VGLNA. 4. Simulation results The VGLNA has been designed for WGDMA and 802.11 b/ g WU\N applications in 0.18 (im CMOS technology. The design has been simulated using Agilent's Advanced Design System (ADS). Fig. 4 and 5 show the S21, Sil and NF of the designed VGLNA at high gain mode. With the power consumption of 12.4 mW from a supply voltage of 1.0 V, the VGLNA achieves power gain of 23.29 dB at 2.4 GHz. The gain is maximized at 2.4 GHz because input matching is optimum at 2.4 GHz. The input return loss is -20 dB. The NF of the designed VGLNA is 1.116 dB at 2.4 GHz for the maximum gain mode. Asforthe minimum gain mode, S21 and Sil are reported to be 9.54 dB and -21 dB as shown in Fig. 6. Fig. 7 shows the NF of the VGLNA at low gain mode which is slightly higher with 1.123 dB. This result is acceptable in comparison with other VGLNAs /13-15/. The designed VGLNA can achieve low NF because the gain of cascode stage mitigates the influence of NF at the gain control block. I I M I ' I ' I ' I 1 4 1 6 1 8 2 0 2.2 2 4 2.6 2 8 3 0 3 2 3' freq, GHz Fig. 4. S21 and S11 of the designed VGLNA at high gain mode. I 1 i I I I I I I 1.4 1.6 1.8 2.0 2.2 2 4 2.6 2.8 3.0 3,2 3,4 freq, GHz Fig. 5. NF of the proposed VGLNA at high gain mode. 20- (BCD "O -O 10-O--10--20 -30 m1 / m1 freq=2.400GHz dB(S(2,1))=9.542 cnTx" m7 freq=2.400GHz dB(S(1,1))^-20.947 Fig. 6. I ' I ' I .....M I ' I 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 freq, GHz S21 and S11 of the designed VGLNA at low gain mode. CM 'S m2 freq=2.400GHz nf(2)=1.123 m 2 T"^" I I i ' I i I M M i I I 1.4 1 6 1 8 2 0 2 2 2 4 2,6 2,8 3 0 3 2 3 4 freq, GHz Fig. 7. NF of the proposed VGLNA at low gain mode. As shown in Fig. 8, the VGLNA achieves continuous gain tuning range of 13.75dBfrom 23.29 dB to 9.54 dB at 2.4 GHz. The gain variation is similar to that of the LNA with the bypass switch method /9/. In addition, the power consumption of the following stages in a receiver such as mixer and automatic gain control (AGO) can be further reduced by achieving the continuous gain control. The NF varies from 1.116 dB to 1.123 dB at minimum gain mode. NF varies very little in comparison with the gain changes because the increase of NF is minimized by the gain of the first stage. As forthe linearity, the third order input intercept point (IIP3) is simulated at low gain mode and it is -2.18 dBm at 2.4 GHz. Thus, the LNA can receive maximum input power of 802.11 b WLAN without much distortion. 25 - 20 E > £ 15 - 10 ^ 5 - J 1 124 -- 1,122 o -■ 1 12 E ž' a> 1 118 u 'Ö 1 116 S" TJ 1,114 lj- z 1.112 05 0 6 0,7 O.i Vc(V) 0 9 1 Fig. 8. Gain and NF variation of ttie VGLNA. Table 1 shows the comparison of performances for the designed VGLNA with other variable gain LNAs. Though gain variation range of proposed VGLNA is smaller than other VGLNAs /9-11 / but it has a much better NF and continuous gain control is achieved. Therefore, overall performance of the proposed VGLNA is better in terms of continuous tuning range and NF. Table 1 Comparison of Variable Gain LNA Performances This work (CMOS) [9] [10] [1 1] [12] [13] Technology (urn) 0.18 0.25 - 0.25 0.18 0.18 Operating frequency (GHz) 2.4 2.4 0.9 5.6 5.7 5.2 Cniin (dB) 23.29 14.7 26 19,5 16.5 20 Gain variation (ciB) 13.75 29 29 19.5 8 20 Yes Continuous gain control Yes No No No Yes Minimum NF (dB) L12 2.88 2.1 3.1 3.5 3.5 Biased current (mA) 12.4 11.7 15 10 3.2 17 5. Conclusion In this paper, a VGLNA for WGDMA and 802.11 b/g is presented. The designed VGLNA composed of a cascode stage and a variable gain block. The VGLNA achieves low NF of 1.12 dB, gain of 23 dB and power consumption of 12.4 mW from 1.0 V power supply. By adding a simple gain control loop composed of a transistor Mgc and a capacitor, the VGLNA achieves a gain tuning range of 13.75 dB with continuous gain control. This is accomplished with a low NF which is reported to be only 1.12 dB. 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