RATIOMETRIC-TO-SUPPLY VOLTAGE OUTPUT BUFFER DESIGN Anton Pleteršek University of Ljubljana, Faculty of Electrical Engineering, Ljubljana, Slovenia Keywords; ratiometric, transfer function, precision, analog-to-digital, converter, gain controi Abstract: Paper is focused to design tine ratiometrioai - signal processing gain stage. The stage is a part of complex integrated system and is operating in a narrow frequency band. Its main part is a programmable operational amplifier, having controlled gain, automatic gain tracking with supply voltage and automatic signal ground tracking with supply voltage VDD. The stage cut-off frequency is 10OHz, the control loop -3dB frequency is at 1 kHz. Precision of ratiometric control is 0.325%, accuracy is 0.6%. The main topics of present paper isto show ratiometric system behavior by the system description with its transfer function and verification using HSPICE and the Matt_ab tooling. The circuit is implemented in O.Sum CMOS technology Končna ojačevalna stopnja z lastnostmi, nastavljivimi z napajalno napetostjo Ključne besede; prevajalna funkcija, točnost, AD pretvornik, kontrola ojačanja, sorazmeren napajanju. Izvleček; V članku je opisana stopnja, katere lastnosti sledijo spremembi pozitivne napajalne napetosti v določenem frakvenčnem pasu. Vezje je zasnovano tako, da sledijo napajalni napetosti - ratiometrično - le lastnosti procesiranega vhodnega signala. Sestavlja ga: DC pretvornik, merilnik napajanja, AD pretvornik, regulacijska zanka za sledenje ojačanja in signalne mase. Cilj članka je opisati vezje s prevajalno funkcijo in jo verificirati s simulacijami {HSPICE). z analizo (MatLab) ter z meritvami na integriranem VLSI vezju. Vezje, kot sestavni del integriranega sistema, je bilo procesirano v O.Sum tehnologiji CMOS. I. Introduction The number of different integrated systems have to have output signal proportional to the supply voltage VDD. Such systems require precisely defined power supply rejection outside useful signal pass as well as good definition for signal transfer function. The ratiometric--to-supply feature is a useful function when processed signal besides its main function i.e. follow the supply voltage changes. The main concept of ratiometry may operate in continues time or may operate digitally weighted via analog-to-digital converter (ADC) where ratiometric signal ground (RAGND) is generated as continous analog signal with appropriate frequency response. The signal to be processed needs to be converted from system - constant analog ground (AGND) to ratiometric ground (AGND) by processing of the input signal in the level-shift gain stage. II. Ratiometric signal processing stage The main system transfer function is expressed as in (1). Rgr is ratiometric-variable resistor with VDD supply. Rg is programmable gain resistor (Fig. 1 in Fig. 2). To complete the function (1) with all the sub-definitions, the transfer function (1) will clearly define the supply voltage dependence, frequency response and temperature stability. = + --^- (11 is the gain of output stage, and 1 is the low-pas filter (100Hz) transfer function. Gain stage is in non-inverting gain configuration. The gain of the stage is linearly dependent on the VDD supply voltage. Gain is programmable from A=3 to A=12 or 12 in 8 -linear steps by varying the resistor Rg. The resistor Rgr is automatically adjusted with varying of the supply voltage VDD in the range of -5% to +5% from its nominal value (5V) and nominal gain of (3 to 6). Ratiometric-gain-setting precision is 0.325% with worst-case accuracy of 0.6%. Used operational amplifier is class AB stage with open-loop gain of 104dB__min and has input referred noise of 260nV/sqrt(Hz)@ lOHzto 93nV/sqrt(Hz)@100Hz. Filter is placed in signal path, having no influence on supply voltage-dependent analog ground (RAGND) and vice- versa. That principle guarantees good common-mode rejection of the output buffer and therefore no distorts the output signal. Filter in supply voltage (Vd generation) influences therefore only on output stage-gain with its low-pass characteristic. Ratiometric blocl^ is shown in Fig. 1, the simplified block diagram is on Fig. 2. Vref2 Vref4 AGND SL i V2V4 V25 vdda sigi am gaO gal , ga2 i j^'pi f'. lout i GAIN:3to 6 : gaO gal VDD ANOUT Fig. 1: Ratiometric output gain stage: sigi is input signal, referred to AGND, ANOUT is the gained output signal, referred to ratiometric RAGND. A. Ratiometric gain The feedback network resistor Rgr is controlled to follow the supply voltage variations VDD, and is included in Vd: 40V„ V. -4] re/'4 Rnf is a unit resistor, 40F. I = F --4 refA the ;■ is a digital code from flash ADC converter, converting the Vd voltage which is proportional to VDD supply. The accuracy of the code is defined by INL and switching point, which mainly depends on resistors matching and comparators offset voltage. B. Ratiometric analog voltage Vd 0.8x 2x R rcf2 (3) da Vd voltage depends on supply voltage VDD and is used for ratiometric gain tracking (1), (2). A is voltage coefficient of the implanted well resistors. The cutoff frequency of voltage Vd is close to 1 kHz and is expressed by: Vd(jm) = {VDD- II-T--- jaC, II.....rV) ycoCj jcoCj 1 + R., (4) Ikfl U«I"J,21 OWD GND Fig. 2: Ratiometric gain stage, consists of the ratiometric signal ground generation, ratiometric gain control by measuring the supply voltage VDD with gain-control stage via 5 bit AD converter (S9), signal converter (S32), active low-pass filter, and programmable and supply voltage controlled gain - class AB operational amplifier (SI). Signal converter freguency response Is also described. It acts as a common mode signal on the Input terminals of the output amplifier (s 1). The output amplifier has a wide freguency range (BW=9MHz) and has high input common-mode-rejection. RAGND In signal converter is therefore omitted from Transfer function (1), it is Included in term Rgr. C. AD converter The 5 bit flash AD converter based on resistors string, array of 32 comparators and decoding logic to convert thermometer code to 5 bit binary code. The switching point of the comparator is: V =V +V ' sw ^ refi ~ ^ off where Vrefi is the voltage on the i-th tab of the AD resistor string, supplied by the reference voltage VrefA and is: E. Reference voltage Vref2 Reference \/ref2 is reference voltage based on silicon-bandgap {Vbgr=1.206V)\ Voltage is stable within 20 ppm/C and has nominal value of 2V. V ref A 40i?,. V. ref4 k=l R V -V ' refi refA A + A 1 Ai? nk 40 2 5 Z-t n A- = l The digital output code is generated when the voltage on i-th tab equals to the analog voltage Vd, including comparator offset voltage Voff: V -V ^ d ^ sw From here the digital code i can be found: 40F, V. re/'4 k=] R (5) If we assume ideal resistors matching, the last term can be omitted, else the term should be taken too. The maximum accuracy errors may occur in the middle of the resistor string and cause the maximum INL error of: INL Kef4 AR 2 nk R.. Rn is resistive unit in the string, ARnk is the value of the resistance error (difference from ideal Rn) due the mismatch. Maximum error therefore may happen around nominal supply voltage. ■ D. Reference voltage Vref4 Reference yref4 is a G7 times magnified voltage, proportional to the bandgap of silicon: (6) Vbe is voltage of the forward biased base-emitter junction of the vertical bipolar device, kT/q is thermal voltage and is 26mV at 300K, J2/J1 is emitter-current density ratio. Vref4 is constant with temperature and may vary for 20 ppm/C from its nominal value of 4V. F. Gain programmability The gain is adjust via trimming circuit using 3 bits (Fig. 2) which gives eight linear gain steps from nominal gain of 3. Resistors are poiysilicon, temperature coefficient is can-celled-out from transfer function (1), also absolute value variations with process is canceled-out due to be fact that amplifier has sufficient open-loop gain and high enough output driving capability: A, = ■ A.. R.. Ao! is open loop of the class AB differential amplifier and is 104dB. G. System signal ground System analog ground voltage (AGND) is gained bandgap voltage Vögr of 1.206V: AGND = (l + G,)^V,^,. and is stable (20 ppm/C) at nominal value of 2,5V. H. Ratiometric analog ground The voltage is generated from VDD supply as a front-end analog signal to the 5 bit AD converter The resistor divider network (RO, R2, R3) of (1, 0.2, 0.8 Mohm) and capacitors {C2, C3)of{100pF, lOOpF) form a low-pass filter followed by unity gain buffer-driver. RAGND atco=0 II t^-) RAGND{j(ü) = VDD- ycoC, 7C0C2 (8) and has voltage coefficient due to implanted resistors used. Ratiometric signal tracking with ratiometric analog ground voltage All other poles come from level-shift circuit, ratiometric ground, etc, are at much higher frequencies. The signal tracking stage is an inverting gain stage acts as a DC level shift to move the signal-voltage from AGND level to ratiometric ground level RAGND. Buffer amplifier is a class A stage with open-loop gain (Aol) of 99dB, gain bandwidth of 1.2MHz and input referred noise 88nV/ sqrt(Hz)@10Hzto28nV/sqrt(Hz)@100Hz. Close-loop gain error of the stage with a gain of OdB is [Aol/( 1 +Aol)] and is negligible. The output voltage of the stage is: VDD = RAGND+ =- rsigi sigl where is Vsigi a signal voltage, relation is valid for co=0. IV. Output stage frequency response The output stage has therefore the frequency response as follows: Where co/ is a given frequency and rop is the cutoff frequency, defined by iow-pas filter constant (1): 1 1 = 3QxQ.-2-21pF which is close to 100Hz (Fig. 5 and Fig. 6). = 617r/sec Conclusion The overall transfer function which include the frequency behavior, the VDD influence, the temperature and the elements matching influence described in the equations (2), (3), (4), (5), (6), ((7), (8)) can be verified by replacing appropriate variables in equation (1). The circuit has been simulated using HSPICE and transfer function verified in MatLab. Results are shown in Fig. 3, Fig. 4, and Fig. 5-to-Fig. 9. On Fig. 5 is oi^era//transfer function (1) included Rgr(f). References: /1/ Arthur B. Williams, "ELECTRONIC FILTER DESIGN HANDBOOK", McGraw-Hill Book Company, 1981 Anton Pleteršek Faculty of Electrical Engineering, Tržaška 25, 1000 Ljubljana, Slovenia e-mall:anton@kalvarlja.fe.uni-lj.si Prispelo (Arrived): 06.06.2002 Sprejeto (Accepted): 25.03.2003 vfsiy ' V(,lglKl fratout rg/rgr: nominal raliomctric vdcl rangc:5v^-5% v(ragmi •v(agrn) 23 2.2 -2.2 m -2,4 m Fig. 3: Ratiometric range is limited to 5V(+-5%). Output DC level and output AC signal amplitude (ANOUT) follow the supply voltage VDD. fratout rg/rgr: nominal gain=3, ratiometric vdd range:5v+-5% Fig. 4: Ratiometric signal ground (RAGND) foiiow the suppiy voltage without significant delay (VDD changes with 10Hz). Output at zero input signal (sigl) follows the ratiometric signal ground, having the same amplitude and frequency response. The low-pass filters have Butterworth filter characteristic, having no overshot and does not have any oscillatory behavior 10 -10 -20 -30